• Title, Summary, Keyword: 에러 정정 부호

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Error Detection and Correction of Prefix Codes using Bidirectionally Decodable bit Streams (양방향 디코딩이 가능한 비트열을 이용한 앞자리 부호의 오차 검출과 정정)

  • Park, Sang-Ho
    • Convergence Security Journal
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    • v.7 no.2
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    • pp.129-134
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    • 2007
  • This paper proposes multiple burst error detection and correction scheme for transmission of Huffman coded string. We use bidirectionally decodable codes and introduce insertion of forbidden symbol to find errors. Additional bits are added to original bit streams to correct errors. The total file size id increased but it can detect errors and recover errors real time.

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Design of an Adaptive Reed-Solomon Decoder with Varying Block Length (가변 블록길이를 갖는 적응형 리드솔로몬 복호기의 설계)

  • Song, Moon-Kyou;Kong, Min-Han
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.4C
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    • pp.365-373
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    • 2003
  • In this paper, we design a versatle RS decoder which can decode RS codes of any block length n as well as any message length k, based on a modified Euclid's algorithm (MEA). This unique feature is favorable for a shortened RS code of any block length it eliminates the need to insert zeros before decoding a shortened RS code. Furthermore, the value of error correcting capability t can be changed in real time at every codeword block. Thus, when a return channel is available, the error correcting capability can be adaptiverly altered according to channel state. The decoder permits 4-step pipelined processing : (1) syndrome calculation (2) MEA block (3) error magnitude calculation (4) decoder failure check. Each step is designed to form a structure suitable for decoding a RS code with varying block length. A new architecture is proposed for a MEA block in step (2) and an architecture of outputting in reversed order is employed for a polynomial evaluation in step (3). To maintain to throughput rate with less circuitry, the MEA block uses not only a multiplexing and recursive technique but also an overclocking technique. The adaptive RS decoder over GF($2^8$) with the maximal error correcting capability of 10 has been designed in VHDL, and successfully synthesized in a FPGA.

Implementation of RFID system with Binary Search Algorithm (이진검색 알고리즘을 적용한 RFID 시스템 구현)

  • Yun Sung-Ki;Kang Byeong-Gwon;Han Ki-Kwan
    • Proceedings of the KAIS Fall Conference
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    • pp.137-140
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    • 2004
  • RFID는 각종 서비스 산업은 물론 물류, 산업 현장, 제조 공장과 물품의 흐름이 있는 곳이면 어디에서나 적용이 가능하여 사회 여러 분야로부터 큰 관심을 받고 있다. 하지만 현재 900Mhz 대역의 RFID에서 사용하는 ISO18000-6의 프로토콜에서는 에러검출을 위한 CRC16만을 사용하여, 에러정정능력을 갖추지 못해 그 신뢰성이 떨어질 것으로 여겨진다. 본 논문에서는 이러한 RFID 시스템의 신뢰성 향상을 위해 Reader에서 Tag로의 Command data 전송 시에 대역확산방식과 콘벌루션부호를 적용하여 시스템의 신뢰성 향상을 목적으로 하며, 이러한 방식을 적용했을 때와 적용하지 않았을 때의 에러 율을 측정 비교하였다.

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SISO-RLL Decoding Algorithm of 17PP Modulation Code for High Density Optical Recording Channel (고밀도 광 기록 채널에서 17PP 변조 부호의 연판정 입력 연판정 출력 런-길이 제한 복호 알고리즘)

  • Lee, Bong-Il;Lee, Jae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.2C
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    • pp.175-180
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    • 2009
  • When we apply the LDPC code for high density optical storage channel, it is necessary to make an algorithm that the modulation code decoder must feed the LDPC decoder soft-valued information because LDPC decoder exploits soft values using the soft input. Therefore, we propose the soft-input soft-output run-length limited 17PP decoding algorithm and compare performance of LDPC codes. Consequently, we found that the proposed soft-input soft-output decoding algorithm using 17PP is 0.8dB better than the soft-input soft-output decoding algorithm using (1, 7) RLL.

Performance of W-CDMA System with SOVA-based Turbo Decoder in ITU-R Realistic Channel (ITU-R 실측채널에서 SOVA 기반의 터보부호를 적용한 W-CDMA 시스템의 성능 분석)

  • Jeon Jun-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.8
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    • pp.1613-1619
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    • 2004
  • Turbo codes of long block sizes have been known to show very good performance in an AWGN channel and the turbo code has been strongly recommended as error correction code for W-CDMA in 3GPP(3rd Generation Partnership Project). Recently, turbo codes of short block sizes suitable for real time communication systems have attracted a lot of attention. Thus, in this paper we consider the turbo code of 1/3 code rate and short frame size of 192 bits in ITU-R channel model. We analyzed the performance of W-CDMA systems of 10MHz bandwidths employing RAKE receiver with not only MRC diversity but also SOVA-based turbo code.

Performance Analysis of CDMA/QPSK System for Watermarked Image Transmission (CDMA/QPSK 시스템에서의 워터마킹된 영상전송에 대한 성능 평가)

  • 조송백;강희조;이말례
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • pp.86-89
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    • 2003
  • 본 논문에서는 CDMA/QPSK 시스템을 이용하여 워터마크가 삽입된 영상 정보 데이터를 다중경로 채널환경에서 전송했을 때 미치는 데이터 손실을 분석하고 에러정정부호 중의 하나인 컨볼루션 기법을 이용하여 성능 개선 정도를 평가하였다. 무선 채널 환경으로써 ITU-R M.1225에서 제시한 시스템 모델링 파라미터중 하나인 보행자 이동 환경의 파라미터를 이용하여 압축된 영상 정보가 전송되었을 때 복원된 영상을 분석하였다.

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Bit-selective Forward Error Correction for Digital Mobile Communications (디지털 이동통신을 위한 비트 선택적 에러정정부호)

  • Yang, Kyeong-Cheol;Lee, Jae-Hong
    • Proceedings of the KIEE Conference
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    • pp.198-202
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    • 1988
  • In digital mobile communications received speech data are affected by burst errors as well as random errors. To overcome these errors we propose a bit-selective forward error correction scheme for the speech data which is sub-band coded at 13 kbps and transmitted over a 16 kbps channel. For a few error correcting codes the signal-to-noise ratio of error-corrected speech is obtained and compared through the simulation of mobile communication channels.

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Performance Analysis of M-ary Impulse Communications over AWGN Channels (AWGN 채널에서 M진 임펄스 통신의 성능 분석)

  • 김동호;백승선;문용규;강희조
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • pp.559-562
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    • 2002
  • 본 논문에서는 최근 제한적으로 사용이 승인된 UWB(초광대역: Ultra-Wideband) 통신을 AWGN 하에서 다중 접속을 고려하지 않은 단일 사용사일 경우로 가정시, M진 값이 변화함에 따른 에러율과 성능 개선 기법으로 BCH를 채용시의 에러율을 비교 분석하였다. 기존에 연구되어 오던 변조로 PAM(Pulse Amplitude Modulation)과 PPM(Pulse Position Modulation)방식을 비교하였으며 에러율 $10^{-6}$을 기준으로 M=2, 4일 경우 PAM이 PPM보다 약 E$_{b}$/N$_{o}$ =3~4[dB], M=8 이상의 경우 PPM이 약 E$_{b}$/N$_{o}$ =9[dB], M=16일 경우 약 E$_{b}$/N$_{o}$ =15[dB]정도 성능이 우수하였다. AWGN 채널 하에서 에러 정정 부호인 BCH(15,7)를 도입하였을 경우 에러율 $10^{-6}$을 기준으로 PAM방식은 약 E$_{b}$/N$_{o}$ 가 약 1[dB], PPM 방식은 M=2, 4일 경우 약 E$_{b}$/N$_{o}$ =1~1.5[dB]정도 개선되었다.

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A Versatile Reed-Solomon Decoder for Continuous Decoding of Variable Block-Length Codewords (가변 블록 길이 부호어의 연속 복호를 위한 가변형 Reed-Solomon 복호기)

  • 송문규;공민한
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.3
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    • pp.29-38
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    • 2004
  • In this paper, we present an efficient architecture of a versatile Reed-Solomon (RS) decoder which can be programmed to decode RS codes continuously with my message length k as well as any block length n. This unique feature eliminates the need of inserting zeros for decoding shortened RS codes. Also, the values of the parameters n and k, hence the error-correcting capability t can be altered at every codeword block. The decoder permits 3-step pipelined processing based on the modified Euclid's algorithm (MEA). Since each step can be driven by a separate clock, the decoder can operate just as 2-step pipeline processing by employing the faster clock in step 2 and/or step 3. Also, the decoder can be used even in the case that the input clock is different from the output clock. Each step is designed to have a structure suitable for decoding RS codes with varying block length. A new architecture for the MEA is designed for variable values of the t. The operating length of the shift registers in the MEA block is shortened by one, and it can be varied according to the different values of the t. To maintain the throughput rate with less circuitry, the MEA block uses both the recursive technique and the over-clocking technique. The decoder can decodes codeword received not only in a burst mode, but also in a continuous mode. It can be used in a wide range of applications because of its versatility. The adaptive RS decoder over GF(2$^{8}$ ) having the error-correcting capability of upto 10 has been designed in VHDL, and successfully synthesized in an FPGA chip.

Hybrid-ARQ protocols based on first-order reed-muller codes with soft decision detectors (연판정 검출기를 사용한 1차 reed-muller 부호에 근거한 복합 자동반복요구 프로토콜)

  • 황원택;김동인
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.5
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    • pp.1256-1265
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    • 1996
  • Soft-decision detectors are used in many FEC and ARQ schemes to enhance the bit-error-probability and system throughput. Also, the hybrid-ARQ protocol is a very efficient schemeto achieve overall performance improvement. In this paper, we propose a new hybrid-ARQ protocol based on the first-order Reed-Muller codes employing soft-decision detectors. The Reed-Muller codes have the virtue of being able to use the fast Green machine decoder that is simple to implement. As the performance measures, the bit-error-probability and system throughput are evaluted for the proposed hybrid-ARQ procol, and compared with those of other hybrid-ARQ schemes. It is shown that the use of the proposed hybrid-ARQ protocol results in significant performance improvement without causing much loss in view of system complexity.

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