• Title/Summary/Keyword: 12-bit

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A Study on the Data Acquisition by Bit Conversion Method (비트변환방식을 이용한 데이터 취득에 관한 연구)

  • 박상길
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.22 no.1
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    • pp.34-40
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    • 1986
  • This paper deals with a new bit conversion method. When 12 bit AID converter is adapted to 16 bit micro-computer, complicated data aquisition method is not necessary to acquire the AID converted data into memory of computer. However, when the 12 bit AID converter is adapted to the 8 bit micro-computer 12 bit data should be divided into 4 bit data and 8 bit data. Therefore the old data-dividing method made 4 bitl2byte of memory space wasted. On the contrary, using the new bit conversion method suggested in this paper the two of 12 bit data are converted into 3 byte of data without extending the AID conversion time.

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The Design of 12-bit Pipeline A/D Converter using the Chua's Circuits (추아회로를 사용한 12-bit 파이프라인 A/D 변환기 설계)

  • Kim, Hyeon-ho;Woo, Hyong-Hwan;Lee, Yong-hui;Yi, Jae-Young;Yi, Cheon-hee
    • Proceedings of the Korea Society for Simulation Conference
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    • 2002.05a
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    • pp.177-181
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    • 2002
  • In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer.

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Disign and Evaluation of a Versatile Data Acquisition and Control Adaptor for IBM Personal Computers (IBM-PC를 위한 다목적용 데이타 수집 및 컨트롤 장치의 개발)

  • Kim, Haidong;Song, Hyung Soo
    • Analytical Science and Technology
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    • v.5 no.3
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    • pp.295-301
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    • 1992
  • A versatile data acquisition and control adaptor for IBM personal computers has been developed. The data acquisition and control adaptor developed contains major components necessary for computerized data acquisition and control instrumentaions. Up to 4 differential analog signals can be acquired through a choice of dual 12-bit analog-to digital converters depending on the experimental requirements. Also, dual 12-bit digital-to-analog converters, three 16-bit programmable most computerized laboratory data acquisition and control instrumentation. The design principle and its applications are described.

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Co60 Gamma-Ray Effects on the DAC-7512E 12-Bit Serial Digital to Analog Converter for Space Power Applications

  • Shin, Goo-Hwan
    • Journal of Electrical Engineering and Technology
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    • v.9 no.6
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    • pp.2065-2069
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    • 2014
  • The DAC-7512E is a 12-bit digital to analog converter that is low power and a single package with internal buffers. The DAC-7512E takes up minimal PCB area for applications of space power electronics design. The spacecraft mass is a crucial point considering spacecraft launch into space. Therefore, we have performed a TID test for the DAC-7512E 12-bit serial input digital to analog converter to reduce the spacecraft mass by using a low-level Gamma-ray irradiator with $Co^{60}$ gamma-ray sources. The irradiation with $Co^{60}$ gamma-rays was carried out at doses from 0 krad to 100 krad to check the error status of the device in terms of current, voltage and bit error status during conversion. The DAC-7512E 12-bit serial digital to analog converter should work properly from 0 krad to 30 krad without any error.

A 12bit 1MSps CMOS SAR ADC Design (12bit 1MSps CMOS 연속 근사화 아날로그-디지털 변환기 설계)

  • Choi, Seong-Kyu;Kim, Sung-Woo;Seong, Myeong-U;Ryu, Jee-Youl
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.05a
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    • pp.352-353
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    • 2013
  • 본 연구에서는 12bit 1MSps 연속 근사화 아날로그-디지털 변환기(Analog to Digital Converter : ADC)를 설계하였다. 설계된 아날로그-디지털 변환기는 0.18um 1Metal 6Poly CMOS 공정을 이용하였고, Cadence tool을 이용하여 시뮬레이션 및 레이아웃 하였다. 시뮬레이션 결과 1.8V의 공급전압에서 전력 소모는 6mW였고, 입력 신호의 주파수가 100kHz 일 때, SNDR은 69.53dB, 유효 비트수는 11.26bit의 결과를 보였다.

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Crystal Chemistry and Dielectric Properties of $Bi_4Ti_3O_{12}$ by the Substitution of Rare Earth Elements (Y, Nd, Sm, Gd) (희토류원소(Y, Nd, Sm, Gd)의 치환에 의한 $Bi_4Ti_3O_{12}$의 결정화학 및 유전물성)

  • 고태경;방규석
    • Journal of the Korean Ceramic Society
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    • v.32 no.10
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    • pp.1178-1188
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    • 1995
  • Bi4Ti3O12 (BIT) and its rare earth (Y, Nd, Sm, Gd)-substituted derivatives were synthesized using a sol-gel method to investigate their microstructures, cystal structures and electrical properties depending on the subsituted elemetns. Nd- or Sm-substitution into BIT appeared to be favorable, while Y- or Gd-substitution occurred with a pyrochlore phase. This suggests that a smaller trivalent rare earth ion may not be favorable in the structure of BIT. The rare earth derivatives showed that their particle sizes and shapes were considerably different depending on the kinds of substituted elements. Y-substitution resulted in developing a relatively even particle size and a dense microstructure. In structure, they may be similar to the pseudo-orthorhombic BIT but close to a paraelectric tetragonal phase. Their a (or b) axes were shortened, compared to the one of BIT. Such a distortion may result a decrease in the tilting of TiO6. BIT and the derivatives showed that their dielectric constants and losses were 40~120 and less than 0.03, respectively in the frequency range of 1~10 MHz. The dielectric loss of Y-substituted derivative was the lowest one and changed a little to frequency. Curie points were observed in all the derivatives like BIT to suggest that they would be ferroelectric. The temperature stability of the delectric properties of the derivatives below the Curie points were relatively better than the one of BIT.

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A Low Power Current-Mode 12-bit ADC using 4-bit ADC in cascade structure (4비트 ADC 반복구조를 이용한 저전력 전류모드 12비트 ADC)

  • Park, So-Youn;Kim, Hyung-Min;Lee, Daniel-Juhun;Kim, Seong-Kweon
    • The Journal of the Korea institute of electronic communication sciences
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    • v.14 no.6
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    • pp.1145-1152
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    • 2019
  • In this paper, a low power current mode 12-bit ADC(: Analog to Digital Converter) is proposed to mix digital circuits and analog circuits with the advantages of low power consumption and high speed operation. The proposed 12 bit ADC is implemented by using 4-bit ADC in a cascade structure, so its power consumption can be reduced, and the chip area can be reduced by using a conversion current mirror circuit. The proposed 12-bit ADC is SK Hynix 350nm process, and post-layout simulation is performed using Cadence MMSIM. It operates at a supply voltage of 3.3V and the area of the proposed circuit is 318㎛ x 514㎛. In addition, the ADC shows the possibility of operating with low power consumption of 3.4mW average power consumption in this paper.

Development of a SHA with 100 MS/s for High-Speed ADC Circuits (고속 ADC 회로를 위한 100 MS/s의 샘플링의 SHA 설계)

  • Chai, Yong-Yoong
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.2
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    • pp.295-301
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    • 2012
  • In this article, we have designed SHA, which has 12 Bit resolution at an input signal range of 1 $V_{pp}$ and operates at a sampling speed of 100 MS/s in order to use at front of high speed ADC. SFDR(Spurious Free Dynamic Range) of the proposed system drops to approximately 66.3 dB resolution when the input frequency is 5 MHz, and the sampling frequency is 100 MHz, however, the circuit without a feedthrough has 12 bit resolution with approximately 73 dB.

The Design of Analog-to-Digital Converter using 12-bit Pipeline BiCMOS (12-bit 파이프라인 BiCMOS를 사용한 A/D 변환기의 설계)

  • 김현호;이천희
    • Journal of the Korea Society for Simulation
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    • v.11 no.2
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    • pp.17-29
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    • 2002
  • There is an increasing interest in high-performance A/D(Analog-to-Digital) converters for use in integrated analog and digital mixed processing systems. Pipeline A/D converter architectures coupled with BiCMOS process technology have the potential for realizing monolithic high-speed and high-accuracy A/D converters. In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. Test/simulation results of the circuit blocks and the converter system are presented. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer. Measured value is DNL=${\pm}$0.30LSB, INL=${\pm}$0.52LSB, SNR=66dBFS and SFDR=74dBc at Fin=24.5MHz. Also Fabricated on 0.8um BiCMOS process.

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An Empirical Study on the Factors to Affect a BIS Use and Its Vitalization Plan : Busan Metropolitan City (버스정보안내기 이용요인 및 활성화 방안에 관한 실증연구 : 부산광역시를 중심으로)

  • Kim, Soon Ja;Hong, Soon Goo;Cha, Yoon Sook;Kim, Jong Weon
    • Journal of Information Technology Services
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    • v.12 no.1
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    • pp.1-14
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    • 2013
  • The government has implemented operating the bus information terminal (hereinafter, 'BIT') to use by building it at a major bus station to solve the problem of traffic congestion. Busan Metropolitan City has been continuously expanding the installation of 'BIT' since 2003. However, there are few research on the factor to use and satisfaction survey on 'BIT' from the perspective of the users. This study, in an effort to inquire into the 'BIT' utilization factor and its vitalization plan, conducted a face to face survey of 172 citizens who had the experience in the 'BIT'. The result of the data analysis showed that usability, convenience, and availability were the critical factors for a BIT use. In addition, the general intention to use 'BIT' was found to be very high as much as 90.7%. The contributions of this study are as follows. The academic contributions is that it proved the relationship between usability, convenience and the intention to use suggested by the information technology acceptance model is supported even in case of 'BIT.' For the practitioners this study provides ground data for a local government to make a plan of a BIT extension.