• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1995.10b
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• pp.139-144
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• 1995

LIBL(Linguistic Instruction Based Leaning) is an effective learning algorithm for fuzzy controller which interpretes and uses natural language of human The possibiliy of the LIBL algorithm to the fuzzy control of dynamic systems is investigated in this paper. Rise time, percent overshoot, and steady stste are proposed as suitable meaning elements for dynamic systems. A supervisor is able to give "higer-level linguistic instruction" to the learning algorithm through these three meaning elements Simulation results for a DC servo motor show the validity of the proposed algorithm.

• The Journal of Korean Association of Computer Education
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• v.7 no.6
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• pp.27-35
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• 2004

Data structure and algorithm are primary courses for computer programming instruction. However, now those are not interesting courses for students because the programming instruction methodologies that used these courses are not the proper methodologies for the visual and windows programming. The Sorting programming is the same as other data structures. Therefore, we developed the VTSPI (Visualization Tool for Sorting Programming Instruction) which is a software component to instruct sorting program effectively for solving these problems. As a result, students can code, understand and debug their programs because VTPSI is software components based on visual programming.

• The KIPS Transactions:PartA
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• v.19A no.1
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• pp.45-50
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• 2012

The demand for faster execution time and lower energy consumption has compelled architects of embedded processors to customize it to the needs of their target applications. These processors consequently provide a rich set of specialized instructions in order to enable programmers to access these features. Such an instruction is typically a $multi$-$output$ $instruction$ (MOI), which outputs multiple results parallely in order to exploit inherent underlying hardware parallelism. Earlier study has exhibited that MOIs help to enhance performance in aspect of instruction counts and code size. However the earlier algorithm does not consider the register pressure. So, some selected MOIs introduce register spill/reload code that increases the code size and instruction count. To attack this problem, we introduce a novel iterated instruction selection algorithm based on the register pressure of each selected MOIs. The experimental results show the suggested algorithm achieves 3% code-size reduction and 2.7% speed-up on average.

• Proceedings of the KSR Conference
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• 2002.10a
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• pp.471-477
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• 2002

In this paper, it is proposed instruction code satisfied algorithm that is able to prevent data collision when transponder access in the area of recognition system that is operated to single channel. Differ from absolute collision is used to in the time domain procedure, instruction code satisfied algorithm, transmits data which don't generate collision and must satisfy instruction code. So, to prevent data collision, transponder is of great if it read the entire instruction code. Consequently, it is applied to algorithm that made the system of wireless recognition13.56 Mhz. As a result, for the time of one bit data transmission had 14${\mu}$s difference, it is proved the prevention of data loss in experiment.

• Journal of the Korean Society of Industry Convergence
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• v.20 no.1
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• pp.1-7
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• 2017

Most conventional processors execute program instructions in a sequential manner. On the other hand, VLIW processor can execute multiple instructions at the same time. It exploits instruction level parallelism to improve system performance. To that end, program code should be rearranged to VLIW instruction format by a compiler. The compiler determine an optimal execution order of instructions of a program code. This instruction ordering is also called instruction scheduling. The scheduling is an algorithm that decides the execution order for instruction codes in loop parts of a program so that the instruction level parallelism can be maximized. In this research, we apply an existing scheduling algorithm to a VLIW FCC and describe analysis results to further improve its performance. And, we present a solution to solve some limitation of the existing scheduling technique. By using our solution, FCC's performance can be improved upto 32% compared to the existing scheduling only setting.

• The Journal of Korean Association of Computer Education
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• v.15 no.3
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• pp.1-10
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• 2012

The flow of computer education in modern knowledge and information society contains the computer science courses to cultivate the higher-level thinking abilities such as logical thinking skills, creativity, and problem-solving ability of learners. The purpose of this study is to recognize the need to promote the algorithmic thinking power to improve the problem solving ability of learners, to design the algorithm class based on the anchored instruction strategy for elementary school students and to verify the effectiveness. Anchored instruction model and cases are added to the class. Elementary school students were subjects and divided into a control group in which the traditional algorithm teaching method was conducted and an experimental group in which algorithm class was conducted applying anchored instruction. As results, an experimental group has shown improvements on problem solving compared to a control group.

• The Journal of the Convergence on Culture Technology
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• v.5 no.1
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• pp.395-399
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• 2019

In order to support various parallel computing systems, it is necessary to extend LLVM IR to more efficiently support vector / matrix and to design LLVM IR to machine code as a new algorithm. As shown in the IR example, RISC instruction generation is naturally generated because the RISC instruction is basically composed of the RISC instruction, and the vector instruction is also not supported. There is a need for new IR structures, command generation algorithms and related extensions to support vector / matrix more robustly. To do this, it is important to map each instruction in the LLVM IR to the appropriate instruction in the target architecture (vector / matrix) (instruction selection algorithm). It is necessary to understand the meaning of LLVM IR command, to compare the meaning of each instruction of the target architecture with syntax, and to select the instruction that matches the pattern to make mapping efficient.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.41 no.4
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• pp.31-39
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• 2004

The ARM7 TDMI microprocessor employ a software routine iteration method in order to handle integer division operation, but this method has long execution time and many execution instruction. In this paper, we proposed ARM7 TDMI microprocessor with integer division instruction. To make this, we additionally defined UDIV instruction for unsigned integer division operation and SDIV instruction for signed integer division operation, and proposed ARM7 TDMI microprocessor data Path to apply division algorithm. Applied division algorithm is nonrestoring division algorithm and additive hardware is reduced using existent ARM data path. To verify the proposed method, we designed proposed method on RTL level using HDL, and conducted logic simulation. we estimated the number of execution cycles and the number of execution instructions as compared proposed method with a software routine iteration method, and compared with other published integer divider from the number of execution cycles and hardware size.

• The Transactions of the Korea Information Processing Society
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• v.2 no.4
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• pp.466-476
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• 1995

This pater describes pipelining algorithm issues for a VLIW(Very Long Instruction Word) System and the effective pipelined processing method by occurrence in pipelined management of processor minimized to timing delay. The proposed algorithm is executed in pipeline and parallel processings, and by combining basic operations variable instruction set can be desinged for various applications. In this paper, we prove and analyze the efficiency of the proposed pipeline algorithm and compare with other processor pipeline algorithm in terms of time minimizing.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.6B
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• pp.544-552
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• 2003

This paper suggests an instruction code sufficiency algorithm preventing data collision when multiple transponders attempt to connect in the radio frequency identification system. Conventional time domain procedure generates unconditional collision. On the other hand, this algorithm prevents data collision by transmitting data when it meets instruction code. When multiple transponders are transmitting data coincidently, they exploit desired data with using difference of arrival time generated by recognition distance, respectively. As a result of simulation, utilizing the wireless recognition system, adopting the suggested algorithm, operating in 13.56MHz frequency band, it verify that there is Anti-collision and data loss by ensuring transmission time difference of one bit by adopting this algorithm.