• Title/Summary/Keyword: Au stud bump

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Effect of Thermal Aging on Intermetallic Compound Growth Kinetics of Au Stud Bump (Au stud 범프의 금속간화합물 성장거동에 미치는 시효처리의 영향)

  • Lim, Gi-Tae;Lee, Jang-Hee;Kim, Byoung-Joon;Lee, Ki-Wook;Lee, Min-Jae;Joo, Young-Chang;Park, Young-Bae
    • Korean Journal of Materials Research
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    • v.18 no.1
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    • pp.45-50
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    • 2008
  • Microstructural evolution and the intermetallic compound (IMC) growth kinetics in an Au stud bump were studied via isothermal aging at 120, 150, and $180^{\circ}C$ for 300hrs. The $AlAu_4$ phase was observed in an Al pad/Au stud interface, and its thickness was kept constant during the aging treatment. AuSn, $AuSn_2,\;and\;AuSn_4$ phases formed at interface between the Au stud and Sn. $AuSn_2,\;AuSn_2/AuSn_4$, and AuSn phases dominantly grew as the aging time increased at $120^{\circ}C,\;150^{\circ}C,\;and\;180^{\circ}C$, respectively, while $(Au,Cu)_6Sn_5/Cu_3Sn$ phases formed at Sn/Cu interface with a negligible growth rate. Kirkendall voids formed at $AlAu_4/Au$, Au/Au-Sn IMC, and $Cu_3Sn/Cu$ interfaces and propagated continuously as the time increased. The apparent activation energy for the overall growth of the Au-Sn IMC was estimated to be 1.04 eV.

Interfacial Microstructure and Mechanical Property of Au Stud Bump Joined by Flip Chip Bonding with Sn-3.5Ag Solder (Au 스터드 범프와 Sn-3.5Ag 솔더범프로 플립칩 본딩된 접합부의 미세조직 및 기계적 특성)

  • Lee, Young-Kyu;Ko, Yong-Ho;Yoo, Se-Hoon;Lee, Chang-Woo
    • Journal of Welding and Joining
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    • v.29 no.6
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    • pp.65-70
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    • 2011
  • The effect of flip chip bonding parameters on formation of intermetallic compounds (IMCs) between Au stud bumps and Sn-3.5Ag solder was investigated. In this study, flip chip bonding temperature was performed at $260^{\circ}C$ and $300^{\circ}C$ with various bonding times of 5, 10, and 20 sec. AuSn, $AuSn_2$ and $AuSn_4$ IMCs were formed at the interface of joints and (Au, Cu)$_6Sn_5$ IMC was observed near Cu pad side in the joint. At bonding temperature of $260^{\circ}C$, $AuSn_4$ IMC was dominant in the joint compared to other Au-Sn IMCs as bonding time increased. At bonding temperature of $300^{\circ}C$, $AuSn_2$ IMC clusters, which were surrounded by $AuSn_4$ IMC, were observed in the solder joint due to fast diffusivity of Au to molten solder with increased bonding temperature. Bond strength of Au stud bump joined with Sn-3.5Ag solder was about 23 gf/bump and fracture mode of the joint was intergranular fracture between $AuSn_2$ and $AuSn_4$ IMCs regardless bonding conditions.

High Electrical Current Stressing Effects on the Failure Mechanisms of Austudbumps/ACFFlip Chip Joints (고전류 스트레싱이 금스터드 범프를 이용한 ACF 플립칩 파괴 기구에 미치는 영향)

  • Kim Hyeong Jun;Gwon Un Seong;Baek Gyeong Uk
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.11a
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    • pp.195-202
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    • 2003
  • In this study, failure mechanisms of Au stud bumps/ACF flip chip joints were investigated underhigh current stressing condition. For the determination of allowable currents, I-V tests were performed on flip chip joints, and applied currents were measured as high as almost 4.2Amps $(4.42\times10^4\;Amp/cm^2)$. Degradation of flip chip joints was observed by in-situ monitoring of Au stud bumps-Al pads contact resistance. All failures, defined at infinite resistance, occurred at upward electron flow (from PCB pads to chip pads) applied bumps (UEB). However, failure did not occur at downward electron flow applied bumps (DEB). Only several $m\Omega$ contact resistance increased because of Au-Al intermetallic compound (IMC) growth. This polarity effect of Au stud bumps was different from that of solder bumps, and the mechanism was investigated by the calculation of chemical and electrical atomic flux. According to SEM and EDS results, major IMC phase was $Au_5Al_2$, and crack propagated along the interface between Au stud bump and IMC resulting in electrical failures at UEB. Therefore. failure mechanisms at Au stud bump/ACF flip chip Joint undo high current density condition are: 1) crack propagation, accompanied with Au-Al IMC growth. reduces contact area resulting in contact resistance increase; and 2) the polarity effect, depending on the direction of electrons. induces and accelerates the interfacial failure at UEBs.

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Temperature Measurement and Contact Resistance of Au Stud Bump Bonding and Ag Paste Bonding with Thermal Heater Device (Au 스터드 범프 본딩과 Ag 페이스트 본딩으로 연결된 소자의 온도 측정 및 접촉 저항에 관한 연구)

  • Kim, Deuk-Han;Yoo, Se-Hoon;Lee, Chang-Woo;Lee, Taek-Yeong
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.2
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    • pp.55-61
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    • 2010
  • The device with tantalum silicide heater were bonded by Ag paste and Au SBB(Stud Bump Bonding) onto the Au coated substrate. The shear test after Au ABB and the thermal performance under current stressing were measured. The optimum condition of Au SBB was determined by fractured surface after die shear test and $350^{\circ}C$ for substrate, $250^{\circ}C$ for die during flip chip bonding with bonding load of about 300 g/bump. With applying 5W through heater on the device, the maximum temperature with Ag paste bonding was about $50^{\circ}C$. That with Au SBB on Au coated Si substrate showed $64^{\circ}C$. The difference of maximum temperatures is only $14^{\circ}C$, even though the difference of contact area between Ag paste bonding and Au SBB is by about 300 times and the simulation showed that the contact resistance might be one of the reasons.

Ultrasonic Bonding of Au Stud Flip Chip Bump on Flexible Printed Circuit Board (연성인쇄회로기판 상에 Au 스터드 플립칩 범프의 초음파 접합)

  • Koo, Ja-Myeong;Kim, Yu-Na;Lee, Jong-Bum;Kim, Jong-Woong;Ha, Sang-Su;Won, Sung-Ho;Suh, Su-Jeong;Shin, Mi-Seon;Cheon, Pyoung-Woo;Lee, Jong-Jin;Jung, Seung-Boo
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.4
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    • pp.79-85
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    • 2007
  • This study was focused on the feasibility of ultrasonic bonding of Au stud flip chip bumps on the flexible printed circuit board (FPCB) with three different surface finishes: organic solderability preservative (OSP), electroplated Au and electroless Ni/immersion Au (ENIG). The Au stud flip chip bumps were successfully bonded to the bonding pads of the FPCBs, irrespective of surface finish. The bonding time strongly affected the joint integrity. The shear force increased with increasing bonding time, but the 'bridge' problem between bumps occurred at a bonding time over 2 s. The optimum condition was the ultrasonic bonding on the OSP-finished FPCB for 0.5 s.

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Overview on Flip Chip Technology for RF Application (RF 응용을 위한 플립칩 기술)

  • 이영민
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.4
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    • pp.61-71
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    • 1999
  • The recent trend toward higher frequencies, miniaturization and lower-cost in wireless communication equipment is demanding high density packaging technologies such flip chip interconnection and multichip module(MCM) as a substitute of conventional plastic package. With analyzing the recently reported research results of the RF flip chip, this paper presents the technical issues and advantages of RF flip chip and suggest the flip chip technologies suitable for the development stage. At first, most of RF flip chips are designed in a coplanar waveguide line instead of microstrip in order to achieve better electrical performance and to avoid the interaction with a substrate. Secondly, eliminating wafer back-side grinding, via formation, and back-side metallization enables the manufacturing cost to be reduced. Finally, the electrical performance of flip chip bonding is much better than that of plastic package and the flip chip interconnection is more suitable for Transmit/Receiver modules at higher frequency. However, the characterization of CPW designed RF flip chip must be thoroughly studied and the Au stud bump bonding shall be suggested at the earlier stage of RF flip chip development.

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High Integration Packaging Technology for RF Application

  • Lee, Young-Min
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 1999.12a
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    • pp.127-154
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    • 1999
  • Interconnect - Wire bonding-> Flip chip interconnect ; At research step, Au stud bump bonding seems to be more proper .Package -Plastic package-> $Z_{0}$ controlled land grid package -Flip Chip will be used for RF ICs and CSP for digital ICs -RF MCM comprised of bare active devices and integrated passive components -Electrical design skills are much more required in RF packaging .Passive Component -discrete-> integrated -Both of size and numbers of passive components must be reduced

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High frequency measurement and characterization of ACF flip chip interconnects

  • 권운성;임명진;백경욱
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2001.11a
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    • pp.146-150
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    • 2001
  • Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. S-parameters of on-chip and substrate were separately measured in the frequency range of 200 MHz to 20 GHz using a microwave network analyzer HP8510 and cascade probe. And the cascade transmission matrix conversion was performed. The same measurements and conversion techniques were conducted on the assembled test chip and substrate at the same frequency range. Then impedance values in ACF flip-chip interconnection were extracted from cascade transmission matrix. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of SiO$_2$filler to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. High frequency behavior of metal Au stud bumps was investigated. The resonance frequency of the metal stud bump interconnects is higher than that of ACF flip-chip interconnects and is not observed at the microwave frequency band. The extracted model parameters of adhesive flip chip interconnects were analyzed with the considerations of the characteristics of material and the design guideline of ACA flip chip for high frequency applications was provided.

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Flip Chip Assembly Using Anisotropic Conductive Adhesives with Enhanced Thermal Conductivity

  • Yim, Myung-Jin;Kim, Hyoung-Joon;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.1 s.34
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    • pp.9-16
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    • 2005
  • This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.

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