• Title/Summary/Keyword: BPM signaling

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Signaling Scheme for Inductive Coupling Link (인덕티브 커플링 송수신 회로를 위한 신호 전달 기법)

  • Lee, Jang-Woo;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.7
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    • pp.17-22
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    • 2011
  • To propose effective signaling scheme for inductive coupling link, inductive coupling channel and signaling schemes are analyzed. For fair comparison of various signaling schemes, a signal quality factor ($Q_{signal}$) is introduced and the NRZ signal scheme shows better signal quality factor than BPM signaling schemes. For simulation, the transmitter for inductive coupling link is designed with 0.13 ${\mu}m$ CMOS process and the inductor is modeled as spiral inductor in chip.

High Speed Inductive Link Using Complementary Switching Transmitter and Integrating Receiver (상보적으로 스위칭하는 송신기와 적분형 수신기를 이용한 고속 인덕티브 링크)

  • Kim, Hyun-Ki;Roh, Joon-Wan;Chun, Young-Hyun;Kwon, Kee-Won;Chun, Jung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.37-44
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    • 2011
  • This paper presents the method of improving the data rate and BER in the inductive coupling link using a BPM signaling method. A complementary switching transmitter is used to remove invalid glitches at transmitted data, and the concept of pre-distortion is introduced to optimize received data. Also, an integrating receiver is used to increase the sampling margin and equalizing transistors are added in the pre-charge path of the integrator and comparator for high frequency operation. The transceiver designed with a 0.13 um CMOS technology operates at 2.4 Gb/s and consumes 5.99 mW from 1.2 V power supply.

An Inductive-coupling Link with a Complementary Switching Transmitter and an Integrating Receiver

  • Jeong, Youngkyun;Kim, Hyun-Ki;Kim, Sang-Hoon;Kwon, Kee-Won;Chun, Jung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.2
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    • pp.227-234
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    • 2014
  • A transceiver for a high-speed inductive-coupling link is proposed. The bi-phase modulation (BPM) signaling scheme is used due to its good noise immunity. The transmitter utilizes a complementary switching method to remove glitches in transmitted data. To increase the timing margin on the receiver side, an integrating receiver with a pre-charging equalizer is employed. The proposed transceiver was implemented via a 130-nm CMOS process. The measured timing window for a $10^{-12}$ bit error rate (BER) at 1.8 Gb/s was 0.33 UI.