• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.749-754
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• 2014

In this paper, we suggest tree-structure-aware GP (Genetic Programming) operators that heed tree distributions in structure space and their possible structural difficulties. The main idea of the proposed GP operators is to place the generated offspring of crossover and/or mutation in a specified region of tree structure space insofar as possible by biasing the tree structures of the altered subtrees, taking into account the observation that most solutions are found in that region. To demonstrate the effectiveness of the proposed approach, experiments on the binomial-3 regression, multiplexor and even parity problems are performed. The results show that the results using the proposed tree-structure-aware operators are superior to the results of standard GP for all three test problems in both success rate and number of evaluations.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.2
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• pp.79-86
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• 2019

For decades, in-memory data structures have been designed for DRAM-based main memory that provides symmetric read/write performances and has no limited write endurance. However, such data structures provide sub-optimal performance for NVM as it has different characteristics to DRAM. With this motivation, we rethink a conventional red-black tree in terms of its efficacy under NVM settings. The original red-black tree constantly rebalances sub-trees so as to export fast access time over dataset, but it inevitably increases the write traffic, adversely affecting the performance for NVM with a long write latency and limited endurance. To resolve this problem, we present a variant of the red-black tree called a hierarchical balanced binary search tree. The proposed structure maintains multiple keys in a single node so as to amortize the rebalancing cost. The performance study reveals that the proposed hierarchical binary search tree effectively reduces the write traffic by effectively reaping the high capacity of NVM.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.11
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• pp.1110-1116
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• 2008

In this paper, we suggest GP operators based on tree structure considering tree distributions in structure space and structural difficulties. The main idea of the proposed genetic operators is to place generated offspring into the specific region which nodes and depths are balanced and most of solutions exist. To enable that, the proposed operators are designed to utilize region information where parents belong and node/depth rates of selected subtree. To demonstrate the effectiveness of our proposed approach, experiments of binomial-3 regression, multiplexer and even parity problem are executed. The experiments results show that the proposed operators based on tree structure is superior to the results of standard GP for all three test problems in both success rate and number of evaluations.

• Journal of KIISE:Information Networking
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• v.36 no.1
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• pp.57-67
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• 2009

Packet forwarding in the Internet routers is to find out the longest prefix that matches the destination address of an input packet and to forward the input packet to the output port designated by the longest matched prefix. The IP address lookup is the key of the packet forwarding, and it is required to have efficient data structures and search algorithms to provide the high-speed lookup performance. In this paper, an efficient IP address lookup algorithm using binary search is investigated. Most of the existing binary search algorithms are not efficient in search performance since they do not provide a balanced search. The proposed binary search algorithm performs perfectly balanced binary search using switch pointers. The performance of the proposed algorithm is evaluated using actual backbone routing data and it is shown that the proposed algorithm provides very good search performance without increasing the memory amount storing the forwarding table. The proposed algorithm also provides very good scalability since it can be easily extended for multi-way search and for large forwarding tables

• Journal of Korea Multimedia Society
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• v.13 no.10
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• pp.1534-1546
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• 2010

In sensor network systems, various hierarchical clustering schemes have been proposed in order to efficiently maintain the energy consumption of sensor nodes. Most of these schemes, however, are hardly applicable in practice since these schemes might produce unbalanced clusters or randomly distributed clusters without taking into account of the distribution of sensor nodes. To overcome the limitations of such hierarchical clustering schemes, we propose a novel scheme called CSM(Clustering using Split & Merge algorithm), which exploits node split and merge algorithm of tree-based indexing structures to efficiently construct clusters. Our extensive performance studies show that the CSM constructs highly balanced clustering in a energy efficient way and achieves higher performance up to 1.6 times than the previous clustering schemes, under various operational conditions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.43-50
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• 2004

The clock skew is one of the major constraints for high-speed operation of synchronous integrated circuits. In this paper, we propose a hierarchical partitioning based clock network design algorithm called Advanced Clock Tree Generation (ACTG). Especially new effective partitioning and refinement techniques have been developed in which the capacitance and edge length to each sink are considered from the early stage of clock design. Hierarchical structures obtained by parhtioning and refinement are utilized for balanced clock routing. We use zero skew routing in which Elmore delay model is used to estimate the delay. An overlap avoidance routing algorithm for clock tree generation is proposed. Experimental results show significant improvement over conventional methods.

• ETRI Journal
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• v.33 no.3
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• pp.344-354
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• 2011

In this paper, a model is introduced named double relation chains (DRC) based on ordered sets. It is proved that using DRC and special relationships among the members of an alphabet, vectors of this alphabet can be stored and searched in a tree. This idea is general; however, one special application of DRC is the longest prefix matching (LPM) problem in an IP network. Applying the idea of DRC to the LPM problem makes the prefixes comparable like numbers using a pair of w-bit vectors to store at least one and at most w prefixes, where w is the IP address length. This leads to good compression performance. Based on this, two recently introduced structures called coded prefix trees and scalar prefix trees are shown to be specific applications of DRC. They are implementable on balanced trees which cause the node access complexity for prefix search and update procedures to be O(log n) where n is the number of prefixes. As another advantage, the number of node accesses for these procedures does not depend on w. Additionally, they need fewer number of node accesses compared to recent range-based solutions. These structures are applicable on both IPv4 and IPv6, and can be implemented in software or hardware.