• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.29B no.9
• /
• pp.1-7
• /
• 1992

This paper proposes a built-in self-test tchnique for CMOS circuits. To detect a stuck-open fault in CMOS circuits, two consequent test patterns is required. The ordered pairs of test patterns for stuck-open faults are generated by feedback shift registers of extended length. A nonlinear feedback shift register is designed by the merging method and reordering algorithms of test patterns proposed in this paper. And a new multifunctional BILBO (Built-In Logic Block Observer) is designed to perform both test pattern generation and signature analysis efficiently.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.6
• /
• pp.122-130
• /
• 2013

The demand and the supply are increasing sharply in accordance with the growth of the Memory Semiconductor Industry. The Flash Memory above all is being utilized substantially in the Industry of smart phone, the tablet PC and the System on Chip (SoC). The Flash Memory is divided into the NOR-type Flash Memory and the NAND-type Flash Memory. A lot of study such as the Built-In Self Test (BIST), the Built-In Self Repair (BISR) and the Built-In Redundancy Analysis (BIRA), etc. has been progressed in the NOR-type fash Memory, the study for the Built-In Self Test of the NAND-type Flash Memory has not been progressed. At present, the pattern test of the NAND-type Flash Memory is being carried out using the outside test equipment of high price. The NAND-type Flash Memory is being depended on the outside equipment as there is no Built-In Self Test since the erasure of block unit, the reading and writing of page unit are possible in the NAND-type Flash Memory. The Built-In Self Test equipped with 2 kinds of finite state machine based structure is proposed, so as to carry out the pattern test without the outside pattern test equipment from the NAND-type Flash Memory which carried out the test dependant on the outside pattern test equipment of high price.

• The Transactions of the Korea Information Processing Society
• /
• v.1 no.2
• /
• pp.272-278
• /
• 1994

The paper proposes a test pattern generator and a signature analyzer for pseudoexhaustive testing of the combinational circuit part within a sequential circuit when performing built-in self test of the circuit. The test pattern generator can scan in the seed test pattern and generate exhaustive test patterns. The signature analyzer can perform the analysis of the circuit response and scan out the result. Such test pattern generator and signature analyzer have been developed using SRL(shift register latch) and LFSR(linear feedback shift register).

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.5
• /
• pp.1089-1095
• /
• 2005

This paper presents a new low-cost Built-In Self-Test (BIST) circuit for 50Hz low noise amplifier (LNA). The BIST circuit is designed for system-on-chip (SoC) transceiver environment. The proposed BIST circuit measures the LNA specifications such as input impedance, voltage gaih, noise figure, and input return loss all in a single SoC environment.

• Korean Institute of Interior Design Journal
• /
• no.9
• /
• pp.134-138
• /
• 1996

The purpose of this study was (1) to examine how people modify and replace the built -in storage furniture in apartments, (2) to identify the problems of the built-in storage furniture and user satisfaction according to the size of the apartments, and (3) to suggest the better built-in furniture design based on the results of the study. Questionnare survey method was used , and the S-APT residents in Suwon and Bundang were selected for this study. The results were analysed by X^2$-test, T-test , F-test, frequency and percentage. It were identified that (1) the residents were not satisfied with their built -in storage furniture by its size and inside composition even in the new apartments, and (2) they tend to modify or purchase new one and these tendency was increased by the floor area increased.

• Steel and Composite Structures
• /
• v.1 no.2
• /
• pp.231-244
• /
• 2001

The strengthening of reinforced concrete structures using externally bonded steel or advanced fibre reinforced plastic (FRP) composites is becoming increasingly common. A key factor affecting the behaviour and reliability of such strengthened structures is the bond strength between the steel or FRP plate and the concrete substrate. Several different experimental set-ups have previously been used to determine bond strength. This paper presents a careful finite element analysis of the stress distributions in these test set-ups. Results show that stress distributions can be significantly different for different set-ups, for similar materials and geometry.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.40 no.7
• /
• pp.623-628
• /
• 2012

Mission Equipment Package(MEP) system is a collection of avionic components that are integrated to perform the mission of the Korean Utility Helicopter(KUH). Built In Test(BIT) reduces the need for skilled personnel and special test equipment, and reduces maintenance down-time of system. The increasing complexity of avionics equipments has resulted in an increased need to provide BIT functions. This paper describe the development and verification for the KUH MEP system BIT.

• Proceedings of the IEEK Conference
• /
• 1998.06a
• /
• pp.807-810
• /
• 1998

This paper presents BIST (Built-in self-test) techniques for detection of path delay faults in digital circuits. In the proosed BIST schemes, the shift registers make possible to concurrently generate and compact the latched test data. Therefore the test time is reduced efficiently. By reordering the elements of th shifte register based on the information of the hamming distance of each memory elements in CUt, it is possible to increase the number of path delay faults detected robustly/non-robustly. Experimental results for ISCAS'89 benchmark circuits show the efficiency of the proposed BIST techniques.

• KIPS Transactions on Computer and Communication Systems
• /
• v.3 no.5
• /
• pp.129-140
• /
• 2014

BIST(Built-in self test) is to detect various faults of the existing memory and BIRA(Built-in redundancy analysis) is to repair detected faults by allotting spare. Also, BISR(Built-in self repair) which integrates BIST with BIRA, can enhance the whole memory's yield. However, the previous methods were suggested for RAM and are difficult to diagnose disturbance that is NAND-type flash memory's intrinsic fault when used for the NAND-type flash memory with different characteristics from RAM's memory structure. Therefore, this paper suggests a BISD(Built-in self diagnosis) to detect disturbance occurring in the NAND-type flash memory and to diagnose the location of fault, and BISR to repair faulty blocks.

• Journal of Korea Multimedia Society
• /
• v.10 no.10
• /
• pp.1260-1270
• /
• 2007

Testing and diagnosis of analog circuits(or mixed-signal circuits) continue to be a hard task for test engineers and efficient test methodologies to solve these problems are needed. This paper proposes a novel analog circuits test technique using time slot specification (TSS) based built-in current sensors (BICS). A technique for location of a fault site and separation of fault type based on TSS is also presented. The proposed built-in current sensors and TSS technique has high testability, fault coverage and a capability to diagnose catastrophic faults and parametric faults in analog circuits. In order to reduce time complexity of test point insertion procedure, external output and power nodes are used for test points and the current sensors are implemented in the automatic test equipment(ATE). The digital output of BICS can be easily combined with built-in digital test modules for analog IC test.