• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.253-256
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• 2002

A programmable CMOS negative resistor has been designed and fabricated in a 0.5um double poly double metal technology. The proposed CMOS negative resistor consists of a positive feedback OTA and a bump circuit with Gaussian-like I-V curve. Measurements of the fabricated chip confirm that the proposed CMOS resistor shows various negative resistance according to control voltage.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.35 no.7
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• pp.799-804
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• 2011

A thermal cycling test was conducted on a chip resistor solder joint with real-time failure monitoring. In order to study the failure mechanism of the chip resistor solder joint during the test, the resistance between both ends of the resistor was monitored until the occurrence of failure. It was observed that the monitored resistance first fluctuated linearly according to the temperature change. The initial variation in the resistance occurred at the time during the cycle when there was a decrease in temperature. A more significant change in the resistance followed after a certain number of cycles, during the time when there was an increase in the temperature. In order to explain the failure patterns of the solder joint, a mechanism for the solder failure was suggested, and its validity was proved through FE simulations. Based on the explained failure mechanism, it was shown that prognostics for the solder failure can be implemented by monitoring the resistance change in a thermal cycle condition.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.457-458
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• 2007

We investigated a resistor network model for the horizontal AlInGaN LED. Adding the proposed current density dependent relative quantum efficiency, the power simulation can be also obtained. Comparing the simulation and the measurement results for the LED with the size of $350{\mu}m$, the model is reasonable to simulate the forward voltage and the light output power. Using this model we investigated the optimization of the position and the number of the finger electrodes in a given chip area. It shows that the center disposition of the p-finger electrode in p-area is optimal for the voltage and best for the power. And the minimum number of the n-finger electrodes is best for the power.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1983.04a
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• pp.45-47
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• 1983

In integrated circuit, for a saving in total chip area per circuit, stably high value resistor was fabricated. Hence this paper explained that the measurement and fabrication of high value semiconductor resistor using ITO thin film. It is also used special material and new method fabrication.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.4
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• pp.148-153
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• 2003

In this paper, the low voltage 3V Sigma-Delta Digital Analog Converter(DAC) is designed for using in the transmitter of ADSL analog front-end. We have developed the CMOS DAC according to ANSI T1.413-2(DMT) standard specifications of the chip. The designed 4th-order DAC is composed of three block which are 1-bit DAC, 1st-order Switched-Capacitor filter and analog active 2nd-order Resistor-Capacitor(RC) filter. The HSPICE simulation of the designed DAC showing 65db SNR, is connected with 1.1MHz continuous lowpass filter. And also, we have performed the circuits verification and layout verification(ERC, DRC, LVS) followed by fabrication using TSMC 2-poly 5-metal p-substrate CMOS $0.35{\mu}m$ processing parameter. Finally, the chip testing has been performed and presented in the results.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.40 no.3
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• pp.259-265
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• 2016

Recently, life prediction models for Pb-based and Pb-free solders used in chip resistor assemblies under thermal cycling have been introduced. The models suggest that the field lifetimes of Pb-free solders would be better than those of Pb-based solders when used for chip resistors under thermal cycling conditions, while the lifetime of the chip assemblies under accelerated test conditions show a reverse relationship. In this study, the prediction models were verified by applying the model to another research case. Finite element models were built, thermal cycling conditions were applied, and the energy densities were calculated. Finally, life prediction analysis was conducted for the cases where Pb-based and Pb-free solders were used. The prediction results were then compared with the test data of the case. It was verified that the predictions of the developed life cycle models are on the practical scale.

• Proceedings of the Korean Reliability Society Conference
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• 2005.06a
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• pp.357-376
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• 2005

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.1
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• pp.73-78
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• 2008

A resistor network model for the horizontal AlInGaN LED was investigated, The parameters of the proposed model are extracted from the test dies and $350{\mu}m$ LED, The center of the P-area is the optimal position of a P-electrode by the simulation using the model. Also the optimal chip size of the LED for the new target current was investigated, Comparing the simulation and fabrication result, the errors for the forward voltage and the light power are average 0,02 V, 8 % respectively, So the proposed resistor network model with the linear forward voltage approximation and the exponential light power model are useful in the simulation for the horizontal AlInGaN LED.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.3
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• pp.269-274
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• 2022

We prepared carbon nanotube (CNT) paper by a vacuum filtration method for the use of a chip-typed resistor as a precision passive device with a constant resistance. Hybrid resistor composed of the CNT resistor with a negative temperature coefficient of resistance (T.C.R) and a metal alloy resistor with a positive T.C.R could lead to a constant resistance, because the resistance increase owing to the temperature increase at the metal alloy and decrease at the CNT could counterbalance each other. The constant resistance for the precision passive devices should be maintained even when a heat was generated by a current flow resulting in resistance change. Performance reliabilities of the CNT resistor for the precision passive device applications such as electrical load limit, environmental load limit, and life limit specified in IEC 60115-1 must be ensured. In this study, therefore, the rated power determination and T.C.R tests of the CNT paper were conducted. -900~-700 ppm/℃ of TCR, 0.1~0.2 A of the carrying current capacity, and 0.0625~0.125 W of the rated power limit were obtained from the CNT paper. Consequently, we confirmed that the application of CNT materials for the precision hybrid passive devices with a metal alloy could result in a better performance reliability with a zero tolerance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.7 no.1
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• pp.10-17
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• 1982

Recently, there has been a great interest in the realization of analog fiters using switched and fixed capacitors and active elements. It is known that a switched capacitor has an performance much better that a resistor in the characteristics of temperature and linearity, and can be fabricated on the much smaller area than the resistor. In this paper all the resistors in the gyrator filter network are relpaced by the switched capacitors for an SC-Gyrator filter circuit can be fully integrated into a single chip by using MOS technology. By experiments we show that the response of designed SC-Gyrator filter is much similar to that of its protorype gyrator filter.