• Title/Summary/Keyword: Chip-on-Film

Search Result 212, Processing Time 0.031 seconds

Chip-on-Glass Process Using the Thin Film Heater Fabricated on Si Chip (Si 칩에 형성된 박막히터를 이용한 Chip-on-Glass 공정)

  • Jung, Boo-Yang;Oh, Tae-Sung
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.14 no.3
    • /
    • pp.57-64
    • /
    • 2007
  • New Chip-on-glass technology to attach an Si chip directly on the glass substrate of LCD panel was studied with local heating method of the Si chip by using thin film heater fabricated on the Si chip. Square-shaped Cu thin film heater with the width of $150\;{\mu}m$, thickness of $0.8\;{\mu}m$, and total length of 12.15 mm was sputter-deposited on the $5\;mm{\times}5\;mm$ Si chip. With applying current of 0.9A for 60 sec to the Cu thin film heater, COG bonding of a Si chip to a glass substrate was successfully accomplished with reflowing the Sn-3.5Ag solder bumps on the Si chip.

  • PDF

A Design of Thin Film Thermoelectric Cooler for Chip-on-Board(COB) Assembly (박막형 열전 소자를 이용한 Chip-on-Board(COB) 냉각 장치의 설계)

  • Yoo, Jung-Ho;Lee, Hyun-Ju;Kim, Nam-Jae;Kim, Shi-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.59 no.9
    • /
    • pp.1615-1620
    • /
    • 2010
  • A thin film thermoelectric cooler for COB direct assembly was proposed and the COB cooler structure was modeled by electrical equivalent circuit by using SPICE model of thermoelectric devices. The embedded cooler attached between the die chip and metal plate can offer the possibility of thin film active cooling for the COB direct assembly. We proposed a driving method of TEC by using pulse width modulation technique. The optimum power to the TEC is simulated by using a SPICE model of thermoelectric device and passive components representing thermal resistance and capacitance. The measured and simulated results offer the possibility of thin film active cooling for the COB direct assembly.

A Study on the Stacked type Film Chip Capacitor (적층형 필름 Chip Capacitor 개발)

  • 송호근;박상식;연강흠;김성호
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 1991.10a
    • /
    • pp.73-78
    • /
    • 1991
  • In this study of stacked type film chip capacitor, the important parameters are heat-treated temperature, pressure and time. We measured the temperature dependence of dielectric properties and dissipation factor and the frequency dependence of dielectric properties, dissipation factor, ESR(Equivalent Series Resistance) and impedance in stacked type film capacitor. As a result, the best conditions of heat-treated temperature, pressure and time were proved to be 130$^{\circ}C$, 10kg/$\textrm{cm}^2$ and 3hrs, respectively.

Double rectangular spiral thin-film inductors implemented with NiFe magnetic cores for on-chip dc-dc converter applications (이중 나선형 NiFe 자성 박막인덕터를 이용한 원칩 DC-DC 컨버터)

  • Lee, Young-Ae;Kim, Sang-Gi;Do, Seung-Woo;Lee, Yong-Hyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2009.11a
    • /
    • pp.71-71
    • /
    • 2009
  • This paper describes a simple, on-chip CMOS compatible the thin-film inductor applied for the dc-dc converters. A fully CMOS-compatible thin-film inductor with a bottom NiFe core is integrated with the DC-DC converter circuit on the same chip. By eliminating ineffective top magnetic layer, very simple process integration was achieved. Fabricated monolithic thin film inductor showed fairly high inductance of 2.2 ${\mu}H$ and Q factor of 11.2 at 5MHz. When the DC-DC converter operated at $V_{in}=3.3V$ and 5MHz frequency, it showed output voltage $V_{out}=8.0V$, and corresponding power efficiency was 85%.

  • PDF

Nanoscale Fabrication of Biomolecular Layer and Its Application to Biodevices

  • Park, Jeong-Woo;Nam, Yun-Suk;Masamichi Fujihira
    • Biotechnology and Bioprocess Engineering:BBE
    • /
    • v.9 no.2
    • /
    • pp.76-85
    • /
    • 2004
  • Biodevices composed of biomolecular layer have been developed in various fields such as medical diagnosis, pharmaceutical screening, electronic device, photonic device, environmental pollution detection device, and etc. The biomolecules such as protein, DNA and pigment, and cells have been used to construct the biodevices such as biomolecular diode, biostorage device, bioelectroluminescence device, protein chip, DNA chip, and cell chip. Substantial interest has focused upon thin film fabrication or the formation of biomaterials mono- or multi-layers on the solid surfaces to construct the biodevices. Based on the development of nanotechnology, nanoscale fabrication technology for biofilm has been emerged and applied to biodevices due to the various advantages such as high density immobilization and orientation control of immoblized biomolecules. This review described the nanoscale fabrication of biomolecular film and its application to bioelectronic devices and biochips.

Environment Corresponding Package by Quantitative Mixing System with Functional Inorganic Material and Polyolefin Resin (기능성 무기물과 폴리올레핀계 수지의 정량적 혼합시스템에 의한 환경대응형 포장소재 개발)

  • Kim, Hi-Sam;Lim, Hyun-Ju;Park, Young-Mi
    • Textile Coloration and Finishing
    • /
    • v.21 no.1
    • /
    • pp.1-9
    • /
    • 2009
  • A lot of research has been made over the recent decade to develop testing packages with antimicrobial properties to improve food safety. In this study, a new method, experimental device and technology for environmental corresponding packages of polypropylene (PP) film has been developed to provide effective temperature buffering during the transport/long-term storage of grains or foodstuffs from the supplier to the market. This quantitatively optimized mixing system enabled to produce PP films with the 700$\sim$1,400d (width;1.5$\sim$3mm, thickness;0.01$\sim$0.5mm). In the whole mixing systems, the finely-granulated inorganic illite and PP virgin chip for master batch (M/B) chip was calculated by digital measurement methods, and then the M/B chip for PP film was adapted through a air jet and PP grinding method. The prepared PP film was characterized with tensile strength and elongation, far infrared radiation (FIR) emissivity, antimicrobial activity and deodorization properties. The results revealed that the two differently grain-sized illite could be show homogeneously dispersed on PP chip surface, and as the increasing of illite content, the FIR emissivity and the anion emission rate of film was increasingly improved. In both of 325 and 1,500 mesh-sized illite contained PP chip, of course the antimicrobial activity was good. But the ultimate deodorization rate for ammonia gas of PP film were found to be approximately the same.

Polyester Film Laminating Technology for Chip Condenser

  • Lee, Yun Dai;Son, Yang Soo;Ahn, Joong Geol
    • Corrosion Science and Technology
    • /
    • v.3 no.4
    • /
    • pp.172-177
    • /
    • 2004
  • Biaxially oriented polyethylene terephthalate copolymer(BO - PET)film laminated aluminiums have been applied for chip condenser case. The BO PET film is characterized by high molecular which gives high corrosion resistance, good adhesion and high heat resistance. The higher orientation lowers formability of the film. So, optimum orientation has to be controlled during the laminating process. And to confirm the adhesion between BO PET and aluminium and to guarantee the formability of PET laminated aluminums, we have controlled the chromium oxides weight on the aluminium and laminating condition ( laminating temperature, soaking temperature and lag time after nip roll and quenching conditions) This paper discusses the effect of the laminating conditions on the formability of laminated aluminums. As results, it is clear that the orientation of the BO PET film decreased with an increase in the strip temperature. When the film temperature is over the melting point of the film, its orientation drastically decreased.

Flexible and Embedded Packaging of Thinned Silicon Chip (초 박형 실리콘 칩을 이용한 유연 패키징 기술 및 집적 회로 삽입형 패키징 기술)

  • 이태희;신규호;김용준
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.11 no.1
    • /
    • pp.29-36
    • /
    • 2004
  • A flexible packaging scheme, which includes chip packaging, has been developed using a thinned silicon chip. Mechanical characteristics of thinned silicon chips are examined by bending tests and finite element analysis. Thinned silicon chips (t<30 $\mu\textrm{m}$) are fabricated by chemical etching process to avoid possible surface damages on them. And the chips are stacked directly on $Kapton^{Kapton}$film by thermal compressive bonding. The low height difference between the thinned silicon chip and $Kapton^{Kapton}$film allows electroplating for electrical interconnection method. Because the 'Chip' is embedded in the flexible substrate, higher packaging density and wearability can be achieved by maximized usable packaging area.

  • PDF