• Title/Summary/Keyword: Circuit moments

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An Analytic Study on Estimating Delay Time in RC-class Interconnects Under Saturated Ramp Inputs (램프 입력에 대한 RC-class 연결선의 지연시간 예측을 위한 해석적 연구)

  • 김기영;김승용;김석윤
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.4
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    • pp.200-207
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    • 2004
  • This paper presents a simple and fast delay metric RC-class interconnects under saturated ramp inputs. The RC delay metric under saturated ramp inputs, called FDM(Fast Delay Metric), can estimate delay times at an arbitrary node using a simple closed-form expression and is extended from delay metric under step input easily As compared with similar techniques proposed in previous researches, it is shown that the FDM technique complexity for a similar accuracy. As the number of circuit nodes increases, there will be a significant difference in estimation times of RC delay between the previous techniques based on two circuit moments and the FDM which do not depend on circuit moments.

A Compression Technique for Interconnect Circuits Driven by a CMOS Gate (CMOS 게이트에 의해서 구동 되는 배선 회로 압축 기술)

  • Cho, Kyeong-Soon;Lee, Seon-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.1
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    • pp.83-91
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    • 2000
  • This paper presents a new technique to reduce a large interconnect circuit with tens of thousands of elements into the one that is small enough to be analyzed by circuit simulators such as SPICE. This technique takes a fundamentally different approach form the conventional methods based on the interconnect circuit structure analysis and several rules based on the Elmore time constant. The time moments are computed form the circuit consisting of the interconnect circuit and the CMOS gate driver model computed by the AWE technique. Then, the equivalent RC circuit is synthesized from those moments. The characteristics of the driving CMOS gate can be reflected with the high degree of accuracy and the size of the compressed circuit is determined by the number of output nodes regardless of the size of the original interconnect circuits. This technique has been implemented in C language, applied to several interconnect circuits driven by a 0.5${\mu}m$ CMOS gate and the equivalent RC circuits with more than 99% reduction ratio and accuracy with 1 ~ 10% error in therms of propagation delays were obtained.

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Comparison of Circuit Reduction Techniques for Power Network Noise Analysis

  • Kim, Jin-Wook;Kim, Young-Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.4
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    • pp.216-224
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    • 2009
  • The endless scaling down of the semiconductor process made the impact of the power network noise on the performance of the state-of-the-art chip a serious design problem. This paper compares the performances of two popular circuit reduction approaches used to improve the efficiency of power network noise analysis: moment matching-based model order reduction (MOR) and node elimination-based MOR. As the benchmarks, we chose PRIMA and R2Power as the matching-based MOR and the node elimination-based MOR. Experimental results indicate that the accuracy, efficiency, and memory requirement of both methods very strongly depend on the structure of the given circuit, i.e., numbers of the nodes and sources, and the number of moments to preserve for PRIMA. PRIMA has higher accuracy in general, while the error of R2Power is also in the acceptable range. On the other hand, PRIMA has the higher efficiency than R2Power, only when the numbers of nodes and sources are small enough. Otherwise, R2Power clearly outperforms PRIMA in efficiency. In the memory requirement, the memory size of PRIMA increases very quickly as the numbers of nodes, sources, and preserved moments increase.

Determination of Optimal Controlled Switching Instants for Circuit Breaker of Shunt Reactors (분로 리액터용 개폐제어 차단기의 최적 개폐시점 선정)

  • 이우영;박경엽;정진교;김희진
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.12
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    • pp.664-669
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    • 2002
  • In this paper the method to determine tire optimal switching instants in order to reduce the transient surges during switching not relevant to the neutral treatment of shunt reactors is presented. This method consists of the following two steps. First, the instants of the voltage peaks between the contacts of each poles and the voltage magnitude as well as the moments of the current zero crosses were found out analytically. Next, the instants of the contact touches or separations were determined in consideration of the rate of decrease of dielectric strength or a circuit breaker and the variation of the its operating time. The results obtained from the EMTP(Electromagnetic Transient Program) analysis studies show that the making instants are established at the peak voltage of each three poles for any conditions of a neutral point and the possible upper limited values of inrush currents due to the variation of the mechanical operating time can be estimated.

Design and evaluation of small size six-axis force/torque sensor using parallel plate sturcture (병렬판구조를 이용한 소형 6축 힘/토크센서의 설계 및 특성평가)

  • Joo, Jin-Won;Na, Gi-Su;Kim, Gap-Sun
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.22 no.2
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    • pp.353-364
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    • 1998
  • This paper describes the design processes and evaluation results of a small-sized six-axis force/torque sensor. The new six-axis force/torque sensor including S-type structure has been developed using a parallel plate structure as a basic sensing element. In order tominimize coupling errors, the location of strain gages has been determined based on the finite element analysis and the connections of strain gages have been made such that the bridge circuit with 4 strain gages becomes balanced. Several design modifications result in a similar strain sensitivity for six-axis forces and moments, and the reduced coupling errors of 2.6% FS between each forces and moments. Calibration test results show that the six-axis load cell developed which has light weight of 135g and the maximum capacities of 196 N in forces and 19.6 N.m in moments is estimated to be within 7.1% FS in coupling error.

Chaos system control via discrete signals (이산 신호에 의한 카오스 시스템 제어)

  • 양기철;권세현;안기형
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.147-150
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    • 1997
  • In the study, we consider chua's circuit which is a paradigmatic chaotic system belonging to Lur'e form. It is shown that the dynamic behavior of such a system can be influenced in such a way as to obtain out of chaotic behavior a desired periodic orbit corresponding to an unstable periodic trajectory which exists in the system. This kind of control can be achieved via injection of a single continuous time signal representing the output of the system associated with an unstable periodic orbit embedded in the chaotic attractor We investigate the case when this signal is sampled, i.e. we supply to the system the control signal at discrete time moments only.

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Antenna factors of short dipole antennas with roberts balun (Roberts밸런을 갖는 단축 다이폴 안테나의 안테나 인자)

  • 김기채
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.3
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    • pp.532-538
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    • 1997
  • Exactly aclculated antenna factors are requeired for determining EMI levels in an actual radiated emission test. In this paper, the antenna factors of short dipole antennas above the ground plane are calculated theoretically for the antenna with Roberts balun specified ANSI C63.5 regulation. Also treated is a half-wavelength dipole antenna with Roberts balun to compare the antenna factors with those of resonant dipole antenna. In formulationof antenna factors the antenna is treated as the boundary value problem of Maxwells equations and is analyzed by the Galerkins method of moments. The balun is treated using circuit theory based on power transmission mismatch.

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Resonant Transmission through Slits in a Cavity inside a Thin Conducting Plane

  • Lee, Jong-Ig;Cho, Young-Ki
    • Journal of electromagnetic engineering and science
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    • v.10 no.3
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    • pp.127-131
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    • 2010
  • In this paper, the problem of electromagnetic transmission via slits in a cavity inside a conducting screen of finite thickness has been considered in the case that the transverse electric(to the slit axis) polarized plane wave is incident on a slit. The problem is solved numerically by the method of moments and the results are compared with those obtained from an equivalent circuit suitable for a case in which the slit width is infinite and the structure is modified to the two partially overlapped conducting planes. It is observed that when the cavity is resonated, the effective slit width reaches its maximum value of $1/\pi$ wavelengths, irrespective of the actual slit width and the incidence angle. When the thickness of the conducting plane is much smaller than the wavelength, the numerical results for the effective slit width(or transmission width) agree well with those obtained from the equivalent circuit, even though the slit is as narrow as the thickness of the conducting plane.

Generation of Open circuit voltage in Insulating Ultra Thin Films in Metal/LB film/Metal Structure (금속/LB film/금속 구조의 절연 초박막에서의 전압 발생)

  • Kwon, Young-Soo;Kang, Dou-Yol
    • Proceedings of the KIEE Conference
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    • 1988.11a
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    • pp.172-174
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    • 1988
  • Studies and measurements of open circuit voltage in a metal/insulator/metal structure where metal are electrodes, when the insulator molecules have dipole moments all oriented parallel to each other have been reported here. The measured voltage has been shown to be directed related to the dipole moment of the molecules in the films. The insulator ultra thin films was deposited on them by the Langmuir-Blodgett technique to obtain the structure referred to as z type and Hetero structure of LB films.

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Novel high-Q veritcal inductor using bondwires for MMICs (본딩와이어를 이용한 MMIC용 고품질 수직형 인덕터)

  • 이용구;윤상기;이해영
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.34D no.9
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    • pp.28-35
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    • 1997
  • A novel high-Q vertical jinductor for MMICs is proposed and characterized in a wide range of frequencies (DC~10 GHz) using the numerical methods such as the PeEC(partial equivalent element circuit), the FDM (finite difference method) and the MoM (method of moments). Electrical superiority of the vertical inductor to the horizontal is observed in terms of the magnetic flux linkage and the ground screening effect. The veritcal bondwire inductor is designed in consideration of the wire bonding feasibility and the optimum electrical peformance. This structure is also analyzed using the equivalent circuit and compared with the conventional spiral inductors From the calculated results, high Q-factor, inductance, and cut-off frequency are observed to be inherent characteristics of the veritcal bondwire inductor.

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