• Journal of the Korea Society of Computer and Information
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• v.6 no.4
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• pp.100-103
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• 2001

The best solution to improve the execution speed of Java program is to make use of the high speed JVM(Java Virtual Machine). The performance of JVM depends on the difference of its implementation. One of the technologies to enhance JVM performance is a JIT(Just-in-Time) code generator. The JIT code generator transforms Java byte code to the native machine code in accordance with computer system platform. The native machine code is faster than the existing interpreter method, since it can reduce the time to analyze the Java byte code. But the JIT code generator have the problem of increasing the traffic between stack and register because of using many register. Therefore, this paper suggests how to reduce the traffic by applying the policy of stack allocation to JIT code generation, as one of the methods to enhance the performance of JVM.

• Proceedings of the Korea Information Processing Society Conference
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• 2001.10b
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• pp.1541-1544
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• 2001

Java virtual machine의 성능을 향상시키기 위해 "JIT(Just-in-Time)"code generator가 고안되었다[3], JIT code generator는 스택기반의 자바 바이트 코드를 레지스터 기반의 native machine code로 변환해 주는 역할을 수행하여 바이트 코드의 번역시간을 줄여준다. 그러나 JIT 는 많은 레지스터의 사용을 야기시키므로 효율적인 레지스터 allocation 정책이 필요하고 스택과 레지스터 간의 traffic 을 가중시킨다. 그러므로 본 논문에서는 자바 바이트 코드의 효율적인 stack allocation 정책을 JIT code generator에 적용함으로 레지스터와의 traffic을 줄이는 방법을 제시하였다.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.6 no.3
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• pp.9-13
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• 2007

In this paper, we propose a system that can be used to provide the national standard time for the general public with ease by using the self-implemented independent time-code generator for transmitting standard time information through both the wired and the wireless networks. The newly proposed time code is different from conventional methods in the point that it has a structural advantage of having an ability of obtaining reliable data by repeatedly transmitting the same information. We observe that it is sufficiently possible to transmit the time information with a microsecond level because measurement result shows that the system uncertainty is about few nanosecond of time-error fluctuation through the self characteristic measurement of total system including the time-code generator and decoder system receiving time-information.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.485-488
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• 2009

The class of BCH codes is a large class of error correction codes. HDL implementation of BCH code generator to change code rate. and used System Generator, and implemented hardware to FPGA. Loaded bit stream to a FPGA board in order to verify this design to Hardware co-simulation from these results. Also, compared as investigated the maximum action frequency through timing analysis and resource of logic in order to evaluate performance of BCH code generator.

• The KIPS Transactions:PartD
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• v.11D no.4
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• pp.907-916
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• 2004

The present code generation system, developing based on single system, Is not easy for developers or maintenance men to share pattern design information in distribution environment. So in this paper, we design and implement XML as basis of web environment, and JiKU/XML object-oriented code generator using pattern design. We use UML to change pattern design to XML code, and create code, suitable to PIML command, to generate design information designed by UML into XML code. This JiKU/XML Object-oriented Code Generator makes 10-step codes, and can be easily applied to web environment. It complements the disadvantage of present generator, F77/J++, and makes standardization of design because it uses UML and design pattern information. We compare it with present system by implement Eases, and as a result, generator suggested in this study gives more effective function.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2003.11a
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• pp.84-91
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• 2003

Flow-Induced Vibration of steam generator tubes may result in fretting wear damage at the tube-to-support locations. KSNP(Korean Standard Nuclear Power plant) steam generators experienced fretting wear in the upper part of U-bend above the central cavity region of steam generators. This region has conditions susceptible to the flow-induced vibration, such as high flow velocity, high void fraction, and longer unsupported span. To improve its performance, APR1400 steam generator is designed with additional supports in this region to reduce unsupported span and to reduce peak velocity in the central cavity region. In this paper, we examined its performance improvement using ATHOS code. The thermal-hydraulic condition in the region of secondary side of APR1400 steam generator is obtained using the ATHOS3 code. The effective mass for modal analysis is calculated using the void fraction, enthalpy, and operating pressure information from ATHOS3 code result. With the effective mass distribution along the tube, natural frequency and mode shape is obtained using ANSYS code. Finally, stability ratios and real mean squared displacements for selected tubes of the APR1400 steam generator are computed. From these results, the current design of the APR1400 steam generator are examined.

• Nuclear Engineering and Technology
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• v.50 no.6
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• pp.981-988
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• 2018

An experiment was performed for the OECD/NEA ROSA-2 Project with the large-scale test facility (LSTF), which simulated a steam generator tube rupture (SGTR) accident due to a double-ended guillotine break of one of steam generator (SG) U-tubes with operator recovery actions in a pressurized water reactor. The relief valve of broken SG opened three times after the start of intact SG secondary-side depressurization as the recovery action. Multi-dimensional phenomena specific to the SGTR accident appeared such as significant thermal stratification in a cold leg in broken loop especially during the operation of high-pressure injection (HPI) system. The RELAP5/MOD3.3 code overpredicted the broken SG secondary-side pressure after the start of the intact SG secondary-side depressurization, and failed to calculate the cold leg fluid temperature in broken loop. The combination of the number of the ruptured SG tubes and the HPI system operation difference was found to significantly affect the primary and SG secondary-side pressures through sensitivity analyses with the RELAP5 code.

• Nuclear Engineering and Technology
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• v.54 no.6
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• pp.2262-2275
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• 2022

The Korea Atomic Energy Research Institute (KAERI) studied the sodium-water reaction (SWR) minimized steam generator for the safety of the sodium-cooled fast reactor (SFR), and selected the copper bonded steam generator (CBSG) as the optimal concept. This paper introduces the conceptual design of the CBSG and the development of the CBSG sizing analyzer (CBSGSA). The CBSG consists of multiple heat transfer modules with a crossflow heat transfer configuration where sodium flows horizontally and water flows vertically. The heat transfer modules are stacked along a vertical direction to achieve the targeted large heat transfer capacity. The CBSGSA code was developed for the thermal-hydraulic analysis of the CBSG in a multi-pass crossflow heat transfer configuration. Finally, we conducted a preliminary sizing and rating analysis of the CBSG for the trans-uranium (TRU) core system using the CBSGSA code proposed by KAERI.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.3
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• pp.506-514
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• 1997

In this paper, we implement digital circuit of despreading delay lock loop for GPS receiver. The designed system consists of Epoch signal generator, two 13bit correlators which correlates the received C/A code and the locally generated C/A code in the receiver, the C/A code generator which generates C/A code of selected satellite, and the direct digital clock synthesizer which generates the clock of the C/A code generator to control the phase and clock rate, the clock controller, and the clock divider. The designed circuit has the function of the acquisition and tracking by the autocorrelation characteristics of Gold code. The controller generates each other control signals according to the correlation value. The designed circuit is simulated to verify the logic functional performance. By using the simulator STR-2770 that generates the virtual GPS signal, the deigned FPGA chip is verified the circuit performance.

• Journal of Energy Engineering
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• v.24 no.2
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• pp.91-102
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• 2015

A thermal-hydraulic design and performance analysis computer code for a once-through steam generator using straight tubes is developed. To benchmark the developed physical models and computer code, an once-through steam generator developed by other designer is simulated and the calculated results are compared with the design data. Also, the same steam generator is analyzed with the best-estimate thermal-hydraulic system code, MARS, for the code-to-code validation. The overall characteristics of heat transfer area, pressure and temperature distributions calculated by the developed code show general agreements with the published design data as well as the analysis results of MARS. It is demonstrated that the developed code can be utilized for diverse purposes, such as, sensitivity analyses and optimum thermal design of a once-through steam generator.