• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.5
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• pp.385-393
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• 2020

This study introduces an analysis and control method for the variation of neutral point current in a grid-tied three-level neutral point clamped (NPC) converter under various grid imbalance operating conditions. Various fault cases with unbalanced amplitude and phase are systematically categorized and described using a unified metric called the imbalance factor. The fundamental component of neutral point current is generated under grid imbalance cases. The pattern and behavior of this fundamental component of neutral point current highly depend on the imbalance factor regardless of the particular type of grid fault cases. The control scheme for regulating the negative sequential component of AC input current effectively reduces the size of the fundamental component of neutral point current under a wide range of grid imbalance cases. The control scheme will enable a grid-tied three-level NPC converter to operate reliably and stably under various types of grid faults.

• International Area Studies Review
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• v.14 no.1
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• pp.121-138
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• 2010

This paper investigates the effectiveness of the Bretton Woods II hypothesis, by analysing the relationship between the exchange rates and the U.S. current account against 9 Asian countries for the period of 1999-2008. According to the estimation results, It is found that the Asian currencies' real depreciation significantly have worsened the U.S. current account against the Asian countries. Also, the U.S. current account was significantly affected by GDP and investment of the U.S. and the Asian countries. Thus, It is hard to say that the main driver of the global imbalance is the exchange rates devaluation policies of Asian countries as the Bretton Woods II hypothesis argues. The global imbalance is more likely to be complementally affected by savings glut in the Asian region and the deficiency of net saving in the U.S. Therefore, the global imbalance is expected to adjust when economic conditions besides exchange rates change.

• Journal of Power Electronics
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• v.16 no.3
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• pp.823-831
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• 2016

A high-efficiency method is proposed to suppress magnetic core imbalance in phase-shifted full-bridge (PSFB) converters. Compared with conventional solutions, such as controlling peak current mode (PCM) or adding DC blocking capacitance, the proposed method has several advantages, such as lower power loss and smaller size, because the additional current sensor or blocking capacitor is removed. A time domain model of the secondary side is built to analyze the relationship between transformer core imbalance and cathode voltage of secondary side rectifiers. An approximate control algorithm is designed to achieve asymmetric phase control, which reduces the effects of imbalance. A 60 V/15 A prototype is built to verify the proposed method. Experimental results show that the numerical difference of primary side peak currents between two adjacent cycles is suppressed from 2 A to approximately 0 A. Meanwhile, compared with the PCM solution, the efficiency of the PSFB converter is slightly improved from 93% to 93.2%.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.916-917
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• 2001

We investigated the properties of a hybrid type superconducting fault current limiter (SFCL), which consists of a transformer with multiple secondary windings and resistive $YBa_2Cu_3O_7$ (YBCO) thin film stripes. The secondary windings of the transformer were coupled with each other, and a superconducting current limiting unit of YBCO stripes was connected to each of them as a switch. Simple connection in series of SFCL units tends to produce imbalance in power among the units due to slight differences in quench current. In current design, magnetic coupling between the SFCL units provides a solution to power dissipation imbalance, inducing simultaneous quench by current redistribution in the YBCO films.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.6
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• pp.629-633
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• 2015

An active balun using current steering for phase correction is presented. The proposed active balun is constructed with two different unit balun structures based on current steering to reduce phase and amplitude errors. This type of topology can be compared with the conventional phase and amplitude correction techniques which do not incorporate the current steering. Designed and fabricated active balun in $0.18{\mu}m$ CMOS process operates over 0.95 - 1.45 GHz band, showing input reflection coefficient under -15 dB, phase error of $11^{\circ}$ and gain error of 0.5 dB. Gain is measured to be 0.3 dB maximum and power consumption of 7.2 mW is measured.

• Journal of Electrical Engineering and Technology
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• v.13 no.3
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• pp.1131-1137
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• 2018

In this paper, the authors suggest a new control algorithm for a three-phase four-wire photovoltaic (PV) inverter with imbalance load compensation function using conventional proportional-integral (PI) controllers. The maximum power of PV panel is calculated by the MPPT control loop. The reference varying signals of current controllers are transformed to two different rotating frames where they become constant signals. Then simple PI controllers are applied to achieve zero steady-state error of the controllers. The proposed control algorithm are modeled and simulated with imbalance load configuration to verify its performance. The simulation results show that the maximum PV power is transferred to the grid and the imbalance power is compensated successfully by the proposed control algorithm. The inverter has a fast response (~4 cycles) during the transient period. The proposed control algorithm can be effectively utilized to the three-phase four-wire inverter with imbalance load compensation function.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1866-1878
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• 2018

This paper presents a neutral point deviation and ripple compensation control method for application to 3-level NPC converters. The neutral point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral point of the dc-link. This paper also proposes a control scheme to compensate for the neutral point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the pole voltages and ac input currents are employed to accurately explain the behavior of 3-level NPC converters. Simulation and experimental results are presented to verify the validity of the proposed method.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.1
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• pp.19-30
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• 2015

A static synchronous compensator (STATCOM) applied to rapidly changing, highly unbalanced loads such as electric arc furnaces (EAFs), requires both positive-sequence and negative-sequence current control, which indicates fast response characteristics and can be controlled independently. Furthermore, a delta-connected STATCOM with cascaded H-bridge configuration accompanying multiple separate DC-sides, should have high performance zero-sequence current control to suppress a phase-to-phase imbalance in DC-side voltages when compensating for unbalanced load. In this paper, actual EAF data is analyzed to reflect on the design of current controllers and a pioneering zero-sequence current controller with a superb transient performance is devised, which generates an imaginary -axis component from the presumed response of forwarded reference. Via simulation and experiments, the performance of the positive, negative, and zero-sequence current control of a cascaded H-bridge STATCOM for EAF is verified.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.11
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• pp.1584-1590
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• 2017

This paper presents a implementation method of reliable speed limitation controller considering motor parameter variation in high speed operation. In spinning process of drum washing machine, speed increase has to be limited when unallowable imbalance mass is detected. Otherwise, severe noise and vibration can happen because noise and vibration are proportional to imbalance mass. To detect imbalance mass, d-axis current magnitude is used. However, we have to compensate for back-emf and power supply variation by means of detecting them because d-axis current is affected by both of them. On the other hand, we have to carefully estimate back-emf because back-emf is affected by stator resistance variation and inverter voltage error. Stator resistance variation can happen by manufacturing process for mass production or temperature variation in running. And there are inverter voltage errors between command voltage from micro-computer to inverter and real voltage from inverter to motor because of rising and falling time delay and turn-on resistance of power semiconductor switch. To solve this problem, we propose 2-step align current injection method which is to inject step-wise current right before starting. By this method, we can simply obtain stator resistance by ratio of voltage without inverter voltage error and current, and we can measure inverter voltage error. So we can obtain more exact model current, and then by simple calculation with compensation gain, we can estimate more accurate motor back-emf. We show that this method works well. It is verified through experiments.

• Transactions on Electrical and Electronic Materials
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• v.6 no.5
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• pp.193-197
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• 2005

We investigated fault current limiting characteristics of the flux-lock type superconducting fault current limiter (SFCL), which consisted of a primary winding and several secondary windings connected in series between $high-T_C$ superconducting (HTSC) thin films. Each YBCO thin film has a 2 mm wide and 42 cm long meander line with 14 stripes of different length. The power imbalance due to the slight difference of Ie between YBCO current limiting elements causes the significant power burden on YBCO element with lower $I_C$. We confirmed from our experiments that the mutual coupling between the primary winding and secondary windings of the flux-lock type SFCL reduced the power imbalance between YBCO current limiting elements compared with the resistive type SFCL connected in series.