• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.6
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• pp.75-80
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• 2023

We show the design of fast invertible block transforms that can replace the DCT in future wireless and portable computing application. This is called binDCT. In binDCT, both the forward and the inverse transforms can be implemented using only binary shift and addition operation. And the binDCT inherits all desirable DCT characteristics such as high coding gain, no DC leakage, symmetric basis functions, and recursive construction. The binDCT also inherits all lifting properties such as fast implementations, invertible integer-to-integer mapping, in-place computation. Thus, this method has advantage of fast implementation for complex DCT calculations. In this paper, we present computation costs and performance analysis between DCT and binDCT using Shapiro's EZW.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.6C
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• pp.602-608
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• 2003

In this paper, we propose an efficient DCT calculation method for fast video encoding. We show that the SAD obtained in the motion estimation and compensation process is decomposed into the positive and negative terms. Based on a theoretical analysis, it is shown that the DCT calculation is classified into 4 cases - DCT Skip, Reduced_DCT1 , Reduced_DCT2, and original DCT- according to the positive and negative terms. In the proposed algorithm, one of 4 cases is used for DCT in order to reduce the computational complexity. The simulation results show that the proposed algorithm achieves computational saving approximately 25.2% without image degradation and computational overhead.

• Microbiology and Biotechnology Letters
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• v.32 no.2
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• pp.190-194
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• 2004

The gene product of dctD (DctD) activates transcription from the dctA promoter regulatory region by the $\sigma^{54}$ -holoenzyme form ofRNA polymerase ($E\sigma^{54}$ ) in Rhizobium meliloti and R. leguminosarum. The Escherichia coli integration host factor (IHF) stimulated DctD-mediated activation from the dctA promoter regulatory region of R. leguminosarum but not R. meliloti. In the absence of UAS, IHF inhibited DctD-mediated activation from both of these promoter regulatory regions. IHF also inhibited activation from R. leguminosarum dctA by nitrogen regulatory protein C (NtrC), another activator of $E\sigma^{54}$ but not by one which lacks a specific binding site in this promoter regulatory region. IHF, however, stimulated NtrC-mediated activation from the R. meliloti dctA promoter. Upon removal of the UAS, IHF inhibited NtrC-mediated transcription activation from the R. meliloti dctA promoter regulatory region. These data suggest that IHF likely faciliates productive contacts between the activators NtrC or DctD and $E\sigma^{54}$ to stimulate activation from dctA promoter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.5C
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• pp.461-467
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• 2003

We propose an efficient method for separable symmetric linear filtering in the DCT domain. First, separable 2-D linear filtering is decomposed into the cascade of 1-D filtering in the DCT domain. We investigate special characteristics of DCT domain filtering matrices when the filter coefficients are symmetric. Then we present the DCT domain 2-D filtering method using these characteristics. The proposed method requires smaller number of multiplications including typical sparseness of DCT coefficients compared to previous DCT domain linear filtering methods. Also, the proposed method is composed of simple and regular operations, which would be appropriate for efficient VLSI implementation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.3C
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• pp.158-166
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• 2005

Even though post-processing methods based on projections onto convex sets (POCS) have shown good performance for blocking artifact reduction, it is infeasible to implement POCS for real-time practical applications. This paper proposes DCT domain post-processing method based on POCS. The proposed method shows very similar performance compared to the conventional POCS method, while it reduces tremendously the computational complexity. DCT domain POCS performs the lowpass filtering in the DCT domain, and it removes the inverse DCT and forward DCT modules. Through the investigation of lowpass filtering in the iterative POCS method, we define kth order lowpass filtering which is equivalent to the lowpass filtering in the kth iteration, and the corresponding kth order DCT domain POCS. Simulation results show that the kth order DCT domain POCS without iteration gives very similar performance compared to the conventional POCS with k iterations, while it requires much less computations. Hence the proposed DCT domain POCS method can be used efficiently in the practical post-processing applications with real-time constraints.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.12
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• pp.1928-1934
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• 1993

This paper presents a fast algorithm of integer discrete cosine transform(IDCT) allowing VLSI implementation by integer arithmetic. The proposed fast algorithm has been developed using Chen`s matrix decomposition in DCT, and requires less number of arithmetic operations compared to the IDCT. In the presented algorithm, the number of addition number is the same as the one of Chen`s algorithm if DCT, and the number of multiplication if the same as that in DCT at N=8 but drastically decreasing when N is above 8. In addition, the drawbacks of DCT such as performance degradation at the finite length arithmetic could be overcome by the IDCT.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.3
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• pp.103-114
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• 1994

This paper proposes an implementation of DCT (Discrete Cosine Transform) and IDCT (Inverse DCT) using a fast DCT algorithm with shift and addition operations instead of multiplications Based on the proposed algorithm, a new VLSI architecture for the DCT and the IDCT is proposed. It shows modularity , regularity and capability for multiprocessing. Its performance is also simulated by a simulation software, "Compass". The results of the simulation provide the quality of decompression images, the increase in processing speed, representing the superiority of the proposed architecture.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.6
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• pp.127-140
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• 2003

This paper develops a novel algorithm of computing 2 Dimensional Discrete Cosine Transform (2D-DCT) via Polynomial Transform (PT) converting 2D-DCT to the sum of 1D-DCTs. In computing N${\times}$M size 2D-DCT, the conventional row-column algorithm needs 3/2NMlog$_2$(NM)-2NM＋N＋M additions and 1/2NMlog$_2$(NM) additions and 1/2NMlog$_2$(NM) multiplications, while the proposed algorithm needs 3/2NMlog$_2$M＋NMlog$_2$N-M-N/2＋2 additions and 1/2NMlog$_2$M multiplications The previous polynomial transform needs complex operations because it applies the Euler equation to DCT. Since the suggested algorithm exploits the modular regularity embedded in DCT and directly decomposes 2D DCT into the sum of ID DCTs, the suggested algorithm does not require any complex operations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.10
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• pp.1433-1443
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• 1993

DCT(Discrete Cosine Transform) / IDCT(Inverse DCT) is widely used in various image compression and decompression systems as well as in DSP(Digital Signal Processing) applications. Since DCT/ IDCT is one of the most complicated part of the compression system, the performance of the system can be greatly enchanced by improving the speed of DCT/IDCT operation. In this thesis, we designed a DCT/IDCT core processor using module generator technique. By utilizing the partial sum and DA(Distributed Arithmetic) techniques, the DCT/ IDCT core processor is designed within small area. It is also designed to perform the IDCT(Inverse DCT) operation with little additional circuitry. The pipeline structure of the core processor enables the high performance, and the high accuracy of the DCT/IDCT operation is obtained by having fewer rounding stages. The proposed design is independent of design rules, and the number of the input bits and the accuracy of the internal calculation coa be easily adjusted due to the module generator technique. The accuracy of the processor satisfies the specifications in CCITT recommendation H, 261.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.10
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• pp.2403-2408
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• 2015

For image data the discrete cosine transform (DCT) has comparable energy compaction capability to Karhunen-Loeve transform (KLT) which is optimal. Hence DCT has been widely accepted in various image and video compression standard such as JPEG, MPEG-2, and MPEG-4. Recently some approximate DCT's have been reported, which can be computed much faster than the original DCT because their coefficients are either zero or the power of 2. Although the level of energy compaction is slightly degraded, the approximate DCT's can be utilized in real time implementation of image or visual compression applications. In this paper, an approximate 8-point DCT which contains 17 non-zero power-of-2 coefficients and high energy compaction capability comparable to DCT is proposed. Transform coding experiments with several images show that the proposed transform outperforms the published works.