• Journal of IKEEE
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• v.24 no.2
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• pp.559-569
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• 2020

One of the deep-running algorithms, CNN's artificial intelligence application uses off-chip memory to store data on the Convolution Layer. DMA can reduce processor load at every data transfer. It can also reduce application performance degradation by varying the order in which data from the Convolution layer is transmitted to the global buffer of the accelerator. For basic layouts with continuous memory addresses, SG-DMA showed about 3.4 times performance improvement in pre-setting DMA compared to using ordinaly DMA, and for Ideal layouts with discontinuous memory addresses, the ordinal DMA was about 1396 cycles faster than SG-DMA. Experiments have shown that a combination of memory data layout and DMA can reduce the DMA preset load by about 86 percent.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.4
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• pp.148-159
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• 2005

We propose a technique for finding the worst case response time (WCRT) of a DMA request that is needed in the schedulability analysis of a whole real-time system. The technique consists of three steps. In the first step, we find the worst case bus usage pattern of each CPU task. Then in the second step, we combine the worst case bus usage pattern of CPU tasks to construct the worst case bus usage pattern of the CPU. This second step considers not only the bus requests made by CPU tasks individually but also those due to preemptions among the CPU tasks. finally, in the third step, we use the worst case bus usage pattern of the CPU to derive the WCRT of DMA requests assuming the fixed-priority bus arbitration protocol. Experimental results show that overestimation of the DMA response time by the proposed technique is within $20\%$ for most DMA request sizes and that the percentage overestimation decreases as the DMA request size increases.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.27 no.3
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• pp.326-333
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• 2003

In the measurement using DMA and CPC in series, there is some time delay for particles classified in DMA to detect in CPC. During this time, the DMA time-response changes due to the velocity profile of sampling tube and the diffusion of particles in the volume that exists between the DMA exit and the detector of ultra-fine CPC. This is called mixing effect. In the accelerated measurement methods like the TSI -SMPS, the size distribution is obtained from the correlation between the time-varying electrical potential of the DMA and the corresponding particle concentrations sampled in DMA. If the DMA time -response changes during this delay time, this can cause the error of a size distribution measured by this accelerated technique. The kernel function considering this mixing effect using the residence time distribution is proposed by Russell et al. In this study, we obtained a size distribution using this kernel to compare to the result obtained by the commercial accelerated measurement system, TSI -SMPS for verification and considered the errors that result from the mixing effect with the geometric mean diameters of originally sampled particles, using virtually calculated responses obtained with this kernel as input data.

• Proceedings of the Korean Society of Dyers and Finishers Conference
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• 2008.10a
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• pp.35-36
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• 2008

A diblock copolymer($PEO_{45}$-MeDMA) derived from [2-(methacryloyloxy) ethyl] trimethylammonium chloride(MeDMA) was synthesized and applied to the meta-aramid fibers. Meta-aramid fabric was pretreated with $PEO_{45}$-MeDMA and successfully dyed with acid dyes. The dyeability of this fabric was investigated and found to depend on the $PEO_{45}$-MeDMA concentration, pH, and dye concentration. The color fastness properties of the copolymer pretreated dyed fabric was evaluated.

• Proceedings of the Korean Information Science Society Conference
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• 1999.10c
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• pp.21-23
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• 1999

CPU에게 최상위 우선순위가 할당된 고정 우선순위 버스 프로토콜에서는 CPU와 DMA 컨트롤러의 버스 요구가 충돌할 경우 DMA 전송이 지연된다. 본 논문에서는 CPU와 다수의 DMA 컨트롤러가 시스템 버스를 공유하는 환경에서 DAM I/O 요구의 최악 응답시간을 분석하는 기법을 제안한다. 제안하는 최악 응답시간 분석 기법은 다음의 세단계로 구성되어 있다. 첫 번째 단계에서는 CPU 상에서 수행중인 각 CPU 태스크별로 최악 버스 요구 패턴을 구한다. 두 번째 단계에서는 이들 CPU 태스크의 최악 버스 요구 패턴을 모두 통합해 CPU 전체의 최악 버스 요구 패턴을 구한다. 최종 세 번째 단계에서는 CPU의 최악 버스 요구 패턴으로부터 DMA 컨트롤러의 버스 가용량을 구하고 DMA I/O 요구의 최악 응답시간을 산출한다. 모의 실험을 통해 제안하는 분석 기법일 일반적인 DMA전송량에 대해 20% 오차 범위 이내에서 안전한 응답시간을 산출함을 보였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.12
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• pp.5375-5400
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• 2016

IOMMU is a hardware unit that is indispensable for DMA. Besides address translation and remapping, it also provides I/O virtual address space isolation among devices and memory access control on DMA transactions. However, currently commodity virtualization platforms lack of IOMMU virtualization, so that the virtual machines are vulnerable to DMA security threats. Previous works focus only on DMA security problem of directly assigned devices. Moreover, these solutions either introduce significant overhead or require modifications on the guest OS to optimize performance, and none can achieve high I/O efficiency and good compatibility with the guest OS simultaneously, which are both necessary for production environments. However, for simulated virtual devices the DMA security problem also exists, and previous works cannot solve this problem. The reason behind that is IOMMU circuits on the host do not work for this kind of devices as DMA operations of which are simulated by memory copy of CPU. Motivated by the above observations, we propose an IOMMU para-virtualization solution called PVIOMMU, which provides general functionalities especially DMA security guarantees for both directly assigned devices and simulated devices. The prototype of PVIOMMU is implemented in Qemu/KVM based on the virtio framework and can be dynamically loaded into guest kernel as a module, As a result, modifying and rebuilding guest kernel are not required. In addition, the device model of Qemu is revised to implement DMA access control by separating the device simulator from the address space of the guest virtual machine. Experimental evaluations on three kinds of network devices including Intel I210 (1Gbps), simulated E1000 (1Gbps) and IB ConnectX-3 (40Gbps) show that, PVIOMMU introduces little overhead on DMA transactions, and in general the network I/O performance is close to that in the native KVM implementation without IOMMU virtualization.

• Journal of the Korean Chemical Society
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• v.10 no.1
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• pp.15-17
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• 1966

Intermolecular hydrogen-bonding between phenol and N,N'-dimethylanilines (DMA) has been studied by infrared spectrophotometry. Results show that DMA acts as n-and ${\pi}$-donor although n-complex predominates. O-H stretching frequency shifts (${\Delta}{\nu}$) were proportional to basicitys of DMA and excellent linearity was observed between ${\Delta}{\nu}$ and the Hammett substituent constant, ${\sigma}$.

• The Korean Journal of Food And Nutrition
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• v.11 no.1
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• pp.20-25
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• 1998

We investigated a DMA, TMA, TMAO, a toxic substance to human body can be generated during drying, in a Pacific saury, Cololabis saira. Changes of amine during drying showed a rapid increasing trend until a day of ninth according to an increasing of ambient temperature. And a content of DMA, TMA, TMAO during artificial drying is lowerd than during natural drying. A case of TMAO contents showed that it was decrease during TMA component is generated in drying process Also they can be generated in a drying process. Thus we concluded that an approvement in a general distribution of Kwamaege is needed for preventing a generation of a toxic component such as a DMA, TMA.

• The Journal of Asian Finance, Economics and Business
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• v.9 no.3
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• pp.295-302
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• 2022

This research aims to determine and analyze: (a) the effects of digital marketing activity (DMAc), digital marketing capability (DMC), and Digital marketing asset (DMA), (b) the effects of DMAc, DMC, and DMA on marketing performance (MP), (c). the effects of entrepreneurial orientation (OE) on MP and (d). the mediating role of OA on the effects of DMAc, DMC, and DMA on OE. The research population is all the small enterprise actors in Kendari city applying digital marketing and having a permanent establishment in Kendari City. The analysis tool used is SEM Partial Least Square. Results of the research show that: (a). DMC and DMA have positive and significant effects on OE while DMAc is found to be insignificant on OE, (b). then, DMAc and DMA have positive and significant effects on MP, and DMC is found to be insignificantly increasing MP, (c). OE has positive and significant effects on MP and (d). DMC effects on MP and effects between DMA and MP are mediated by OE, whereas DMA effects on MP are not mediated by OE position. Based on research findings, DMC and DMA are superior at forming research opinions since they have a substantial influence on enhancing collaboration.

• Journal of IKEEE
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• v.10 no.1 s.18
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• pp.22-29
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• 2006

In this paper, we present the efficient way of SDRAM accessing through the DMA(Direct Memory Access) when a microprocessor and peripheral blocks are sharing a SDRAM. The microprocessor is able to access a memory through the AMBA which is the system bus provided by ARM Corporation and DMAs are able to access a memory through their own bus. Peripheral block's reading and writing on the SDRAM memory are realized by the intermediate DMA in order to minimize times of access and addressing the memory. While the microprocessor doesn‘t access to the SDRAM aproaching other registers or occurring a hit signal for fetching program or data, the DMAs may read/write the data in the SDRAM without an interference of the AMBA. This way increases the efficient of the system and performance is more by 16.8%.