• Journal of IKEEE
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• v.15 no.4
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• pp.281-286
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• 2011

DVB-T2 is a next generation DTV transmission standard, which supports various channel bandwidths. Since the symbol rate of the DVB-T2 signal is changed according to its bandwidth, the received signal needs to be sampled at a different frequency. The sampling frequency should be also adjusted depending on the sampling frequency offset due to the frequency error in the local oscillator. The sampling frequency can be locked into the symbol frequency by resampling the sampled data by ADC running at a fixed frequency. In this paper a resampler architecture for DVB-T2 is proposed. And the simulation results reveal the spectral characteristics of each subcarriers used in DVB-T2 system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.11
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• pp.2113-2120
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• 2015

This paper presents an integrated receiver to support multimode broadcasting standards such as DVB-T2, DVB-C2, and DVB-S2 in a single platform. The integrated receiver consists of a tuner block, a receiver engine, a frame processor, and an A/V decoder. The receiver engine includes a channel decoding engine and a demodulation engine to perform OFDM and APSK demodulations. The frame processor performs deinterleaving and BB frame decoding functions. The demodulator engine and the frame processor are implemented in two FPGA devices and DSP-based embedded software, respectively. To verify the functionality of the integrated receiver, it is tested in the laboratory. Commercial PC-based modulators are used to generate the DVB-T2, DVB-C2, and DVB-S2 modulated signals. The integrated receiver was tested under various operation modes as specified in the standards such as DVB-T2, DVB-C2, and DVB-S2 and showed successful operation in all the scenarios tested.

• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.278-280
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• 2007

In this paper, wd design the Program Specific Information (PSI) parser and its On-Screen Display (OSD) on the middleware of ALi M3330 MPEG-2 decoder processor to analyze DVB-T Transport Stream(TS) information. To test the functional operation of the designed parser, we implement the DVB-T test board including the RF-tuner using ALi M3330 MPEP-2 decoder processor and confirm the correct operation using the input TS stream generated by DVB-T stream generator. The developed PSI parser could be used for the test environment, various channel extension, and the development of DVB-T reception module.

• Journal of Advanced Navigation Technology
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• v.15 no.1
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• pp.61-68
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• 2011

DVB-T2 system developed by DVB project is the next generation digital terrestrial television broadcasting standard designed for offering HDTV service in a post-Analog Switch Off (AOS) environment. In this paper, the performance of DVB-T2 is evaluated with the help of computer simulation. The bits error rate(BER) performance is studied in both AWGN, Rayleigh, Ricean and 0db-echo channel. Firstly, we will give a brief introduction to DVB-T2 system and then compare its BER performance to that of Implementation Guideline.

• Information and Communications Magazine
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• v.25 no.8
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• pp.55-61
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• 2008

본고에서는 차세대 디지털 지상파 TV표준으로 알려진 DVB-T2(Digital Video Broadcasting-the 2nd Generation Terrestrial)에 대해 소개한다. DVB-T2 기술은 ASO(Analogue Switch Off) 이후의 환경을 위해 DVB프로젝트에 의해 개발되었으며 최신의 변조 및 코딩 기술을 채택하고 있다. 기존 DVB-T에 비해 전송효율을 30% 이상 증가시킬 수 있으며 2010년경에 상용화 될 것으로 예상된다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.9
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• pp.14-23
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• 2010

This paper reports the fabrication of a DVB-T/H System in Package (SiP) that is able to receive and process the DVB-T/H signal. The DVB-T/H is the European telecommunication standard for Digital Video Broadcasting (DVB). An IC-embedded Printed Circuit Board (PCB) process, interpose a chip between PCB layers, has applied to the DVB-T/H SiP. The chip inserted in DVB-T/H SiP is the System on Chip (SoC) for mobile TV. It is comprised of a RF block for DVB-T/H RF signal and a digital block to convert received signal to digital signal for an application processor. To operate the DVB-T/H IC, a 3MHz DC-DC converter and LDO are on the DVB-T/H SiP. And a 38.4MHz crystal is used as a clock source. The fabricated DVB-T/H SiP form 4 layers which size is $8mm{\times}8mm$. The DVB-T/H IC is located between 2nd and 3rd layer. According to the result of simulation, the RF signal sensitivity is improved since the layout modification of the ground plane and via. And we confirmed the adjustment of LC value on power transmission is necessary to turn down the noise level in a SiP. Although the size of a DVB-T/H SiP is decreased over 70% than reference module, the power consumption and efficiency is on a par with reference module. The average power consumption is 297mW and the efficiency is 87%. But, the RF signal sensitivity is declined by average 3.8dB. This is caused by the decrease of the RF signal sensitivity which is 2.8dB, because of the noise from the DC-DC converter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.8
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• pp.1575-1580
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• 2012

In this paper, a DVB-T2(Digital Video Broadcasting-the 2nd Generation Terrestrial) receiver is designed under a USB-type windows environment, and the baseband frames for MPEG2-TS stream(File or Ethernet Modes) are analyzed for verifying the receiver. In addition, the performance of the BICM(Bit Interleaved Coding & Modulation) module in the receiver is analyzed in terms of PLP(Physical Layer Pipe) and L1(Layer 1) signals.

• Journal of Internet Computing and Services
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• v.12 no.3
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• pp.111-117
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• 2011

In this paper, the BER(Bit Error Rate) performance of a DVB-T2(Second Generation Digital Terrestrial Television Broadcasting System) in MISO(Multiple Input Single Output) transmission mode is evaluated by the computer simulation. In the DVB-T2 receiver, an IDD(Iterative Demapping and Decoder) technique is employed that exchanges extrinsic information between the demapper and the LDPC decoder. Simulation results show that the IDD-based DVB-T2 receiver in MISO transmission mode provides 2dB gain at BER of $10^{-4}$ but suffer from the frequency offsets between transmit antennas.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2016.06a
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• pp.240-241
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• 2016

본 논문은 FTN(faster-than-Nyquist) 신호가 적용된 DVB-T2 시스템의 동기 알고리듬에 미치는 영향에 대하여 분석하였다. 파일럿 기반의 동기 알고리듬은 FTN 신호의 간섭 영향으로 인하여 동기 성능의 열화가 발생한다. 기존의 DVB-T2 시스템을 기반으로 하여 FTN 변수에 따른 성능의 변화를 실험으로 분석하고 SUI 채널 환경에서의 성능을 분석하였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.6 no.2
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• pp.610-628
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• 2012

Dual carrier frequency offsets (CFOs) occur in multiple-input single-output (MISO)-mode DVB-T2 systems, where signals are transmitted simultaneously from two distributed transmitters in a single frequency network (SFN). In this paper, we first derive an optimal compensation frequency for dual CFOs. We also propose an algorithm that optimizes the compensation frequency for the MISO-mode DVB-T2 application. Its performance is compared with the conventional scheme by using a full DVB-T2 simulator.