• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.107-112
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• 2011

This paper is for improving the RF frequency performance of a fabricated 100nm ${\Gamma}$-gate MHEMT, scaling down vertically for the epitaxy-structure layers of the device. Hydrodynamic simulation parameters are calibrated for the fabricated MHEMT with the modulation-doped $In_{0.52}Al_{0.48}As/In_{0.53}Ga_{0.47}$As heterostructure grown on the GaAs substrate. With these calibrated parameters, simulations for the vertically-scaled epitaxial layers of the device are performed and analyzed for DC/RF characteristics, including the quantization effect due to the thickness reduction of InGaAs channel layer. A newly designed epitaxy-structure device shows higher extrinsic transconductance, $g_m$ of 1.556 S/mm, and higher frequency performance, $f_T$ of 222.5 GHz and $f_{max}$ of 849.6 GHz.

• Transactions of the Korean Society of Automotive Engineers
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• v.4 no.5
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• pp.9-15
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• 1996

A silicon microaccelerometer is designed and fabricated using silicon epitaxial layers for automotive electronic airbag applications. A cantilever structure is chosen for high sensitivity and piezoresistive detection method is adopted for circuit simplicity and low cost. An optimum design is used to find optimum microstructure sizes for maximum sensitivity subject to performance requirements and design constraints on natural frequency, damping ratio, maximum allowable stress and microfabrication limitations. The microaccelerometer is fabricated by micromachining processing steps, composed of material-selective and orientation-dependent chemical etching techniques. Fabricated prototype shows a sensitivity of 88.6$\mu\textrm{V}$/g within a resonant frequency of 1.75KHz. Estimated performance of the microaccelerometer is compared with measured one. Discrepancy between the theoretical values and the experimental values is discussed together with possible sources of the errors.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.8
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• pp.81-87
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• 1993

The growth thickness uniformity of epitaxial layers deposited using a moiecular beam epitaxy system is calculated from the arrangement of molecular beam source and the substrate and the geometric dimensions of the crucible in order to predict the optimum design conditions of the prototype MBE system. The thickness uniformity better than 5% over a 3-inch wafer can be obtained by keeping the distance between the substrate and the crucible's orifice longer than 20cm, the tapering angle of the crucible larger than 6$^{\circ}$, and the angle between the normal to the substrate at the center and the crucible axis as larger as possible. In addition, the growth yield decreases to below 51% as the distance between the substrate and the orifice becomes longer than 25cm.

• Progress in Superconductivity and Cryogenics
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• v.22 no.3
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• pp.7-12
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• 2020

Electromechanical properties of REBCO CC tapes are known to be limited by defects (cracks) that form in the brittle REBCO layer. These defects could be inherently acquired during the CC tapes' manufacturing process, such as slitting, and which can be initiated at the CC tapes' edges. If propagated and long enough, they are believed to cause critical current degradation and can substantially decrease the delamination strength of CC tapes. Currently, commercially available CC tapes from various manufacturers utilize different growth techniques for depositing the REBCO layers on the substrates in their CC tapes preparation. Their epitaxial techniques, unfortunately, cannot perfectly avoid the formation of particles, in which sometimes acts as current blocking defects, known as outgrowths. Collective research regarding the composition, size, and formation of these particles for various CC tapes with different deposition techniques are particularly uncommon in a single study. Most importantly, these particles might interact in one way or another to the existing cracks. Therefore, systematic investigation on the interactions between the cracks' development mechanism and particles on the REBCO superconducting layers of practical CC tapes are of great importance, especially in the design of superconducting devices. Here, a proper etching process was employed for the CC tapes to expose and observe the REBCO layers, clearly. The scanning electron microscope, field emission scanning microscope, and energy-dispersive x-ray spectroscopy were utilized to observe the interactions between cracks and particles in various practical CC tapes. Particle compositions were identified whether as non-superconducting or superconducting and in what manner it interacts with the cracks were studied.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.5
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• pp.442-451
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• 1992

Mach-Zehnder type GaAs elcetro-optic waveguide modulator has been designed in this paper.The modulator. Considered is based on the Mach-Zehnder interferometer configuration, consisting of two Y branch couping rib type waveguides formed in two epitaxial layers on GaAs substrate. The mode theory on waveguides and electo-optic effect of GaAs were utilized to determine the design parameters for the modulator proposed. Effective index method was applied to design the of waveguide supporting a single mode were calculated to achieve the optimized operation of the modulator. Considering interrelationships between many parameters.

• Progress in Superconductivity
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• v.3 no.1
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• pp.87-90
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• 2001

We designed a high temperature superconducting rapid single flux quantum(RSFQ) T flip-flop(TFF) circuit using Xic and WRspice. According to the optimized circuit parameters, we fabricated the TFF circuit with $Y_1$$Ba_2$Cu$_3$$O_{7-x}$(YBCO) interface-controlled Josephson junctions. The whole circuit was comprised of five epitaxial layers including YBCO ground plane. The interface-controlled Josephson junction was fabricated with natural junction barrier that was formed by interface-treatment process. In addition, we report second design for a new flip-flop without ground palne.e.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.327.1-327.1
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• 2014

Nitrides-on-silicon structures are considered to be an excellent candidate for unique design architectures and creating devices for high-power applications. Therefore, a lot of effort has been concentrating on growing high-quality III-nitrides on Si substrates, mostly Si(111) and Si(001) substrates. However, there are several fundamental problems in the growth of nitride compound semiconductors on silicon. First, the large difference in lattice constants and thermal expansion coefficients will lead to misfit dislocation and stress in the epitaxial films. Second, the growth of polar compounds on a non-polar substrate can lead to antiphase domains or other defective structures. Even though the lattice mismatches are reached to 16.9 % to GaN and 19 % to AlN and a number of dislocations are originated, Si(111) has been selected as the substrate for the epitaxial growth of nitrides because it is always favored due to its three-fold symmetry at the surface, which gives a good rotational matching for the six-fold symmetry of the wurtzite structure of nitrides. Also, Si(001) has been used for the growth of nitrides due to a possible integration of nitride devices with silicon technology despite a four-fold symmetry and a surface reconstruction. Moreover, Si(110), one of surface orientations used in the silicon technology, begins to attract attention as a substrate for the epitaxial growth of nitrides due to an interesting interface structure. In this system, the close lattice match along the [-1100]AlN/[001]Si direction promotes the faster growth along a particular crystal orientation. However, there are insufficient until now on the studies for the growth of nitride compound semiconductors on Si(110) substrate from a microstructural point of view. In this work, the microstructural properties of nitride thin layers grown on Si(110) have been characterized using various TEM techniques. The main purpose of this study was to understand the atomic structure and the strain behavior of III-nitrides grown on Si(110) substrate by molecular beam epitaxy (MBE). Insight gained at the microscopic level regarding how thin layer grows at the interface is essential for the growth of high quality thin films for various applications.

• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.53-57
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• 2012

This paper is for accurately simulating the breakdown of MHEMTs with an InP-etchstop layer. 2D-Hydrodynamic simulation parameters are investigated and calibrated for the InP-epitaxy layer. With these calibrated parameters, simulations are performed and analyzed for the breakdown of devices with an InP-etchstop layer. In the paper, the impact-ionization coefficients, the mobility degradation due to doping concentration, and the saturation velocity for InP-epitaxy layer are newly calibrated for more accurate breakdown simulation.

• Journal of the Semiconductor & Display Technology
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• v.12 no.3
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• pp.23-27
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• 2013

This paper is for enhancing the breakdown voltage of MHEMTs with an InP-etchstop layer. Gate-recess structures has been simulated and analyzed for the breakdown of the devices with the InP-etchstop layer. The fully removed recess structure in the drain side of MHEMT shows that the breakdown voltage enhances from 2V to almost 4V and that the saturation current at gate voltage of 0V is reduced from 90mA to 60mA at drain voltage of 2V. This is because the electron-captured negatively fixed charges at the drain-side interface between the InAlAs barrier layer and the $Si_3N_4$ passivation layer deplete the InGaAs channel layer more and thus decreases the electron current passing the channel layer. In the paper, the fully-recessed asymmetric gate-recess structure at the drain side shows the on-breakdown voltage enhancement from 2V to 4V in the MHEMTs.

• Journal of the Semiconductor & Display Technology
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• v.12 no.4
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• pp.21-25
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• 2013

This paper is for enhancing the breakdown voltage of MHEMTs with an InP-etchstop layer. The fully removed recess structure in the drain side of MHEMT shows that the breakdown voltage enhances from 2 V to 4 V in the previous work. This is because the surface effect at the drain side decreases the channel current and the impact ionization in the channel at high drain voltage. In order to increase the breakdown voltage at the same asymmetric gate-recess structure, the InGaAs channel structure is replaced with the InGaAs/InP composite channel in the simulation. The simulation results with InGaAs/InP channel show that the breakdown voltage increases to 6V in the MHEMT as the current decreases. In this paper, the simulation results for the InGaAs/InP channel are shown and analyzed for the InGaAs/InP composite channel in the MHEMT.