• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.3
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• pp.177-183
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• 2018

Currently, digital signal processing systems are used extensively in image processing, audio processing, filtering, and equalizations, etc. In addition, the importance of DRAM, which has a great influence on the performance of an digital signal processor has been increased, making research on DRAM actively conducted in industry and academia. Therefore, it is important to have a more accurate DRAM model in order to obtain reliable results when evaluating the performance of a digital signal processor through simulation. In this paper, we developed a digital signal processor simulator capable of inter-working with a DRAM simulator. With the simulator, we analyzed the influence of the DRAM model which operates correctly on a cycle-by-cycle basis, on the performance of the digital signal processor by using the UTDSP digital signal benchmark.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.902-907
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• 1986

A real-time microprogrammable digital signal processor is designed and implemented using the bit-slice logic, a parallel multiplier, 74 series TTLs and MOS memories. A microinstruction set for the processor is defined and an application program development system is constructed. For its performance evalution, a digital filter and FFT are implemented with this digital signal processor. It is proved that this processor is faster than commrcially available single chip digital signal processors such as \ulcornerD 7720, AMI 2811, enabling very high speed digital signal processing.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.08a
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• pp.65-68
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• 2000

In this paper, as a compatible software radio transmission system, Digital-Radio conversion system which can directly change the digital signal generated by the logic circuit into radio signal is proposed. By the vector synthesis method, the digital signals can change directly into radio signal. If such a circuit is realized, RF circuit and an antenna can be composed by the simple one device, and the radio is directly controlled and performed by the software processing which is the essence of software radio. This Digital-Radio conversion system of this paper give many number of communication channels being offered by PN code and offer a hardware design flexibility by digitization, therefore it decrease the percentage ratio of hardware of system and give a more flexible function of software basis. In this paper, this proposed Digital-Radio conversion system is called D/R converter, and the principle of this D/R converter, radio signal generation algorithm is explained and the performance characteristics of proposed algorithm is shown in time base by the computer simulation method.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.6
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• pp.119-127
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• 1996

The proposed method uses a signal of the smae frequency as the input modulating carrier frequency and of a different phase. This signal is generated in the digital automatic frequency control part to decide the input color demodulated signal. And the phase error from the burst signal is calculated. The calculated phase error is utilized to rmove the phase error contained inthe demodulated color signal. In this paper, digital signal processing of automatic color control is proposed for VCR system campatible with both NTSC and PAL TV systems.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.08a
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• pp.17-20
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• 2000

In a digital communication system, the transmission channel may introduce error into the digital signal being transmitted. It would be useful if a process could be devised so that the error could be removed in order to recover the transmitted digital signal. We design a corrective filter that is inverse filter, which will generate an output signal identical to the input signal. in order for two systems connected in cascade to produce an output which is identical to the input signal, the over-all unit sample response of the cascade connection must be a unit sample function.

• Journal of Korea Society of Digital Industry and Information Management
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• v.10 no.4
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• pp.63-70
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• 2014

Method a target estimation in spatial are mobile wireless communication using network cell and GPS. It have much error that mobile wireless communication depend on cell size. GPS method can't find a target in shadow and inner area. In this paper, we estimate a target as direction of arrival method using adaptive array antenna system. Adaptive array antenna system can obtain desired signal to remove other signal This paper studied digital beamforming method in order to estimation a target. Proposed method is modified optimum weight and antenna error correction to estimation an optimal receive signal. Digital beamforming method decided a signal phase and amplitude from received signal on array antenna element. But if it is not to do error correction of received signal, system performance have decreased. Firstly, we proposed modified optimum weight in order to finding desired target. Secondly, we are error correction of antenna incident signals by optimal weight before digital beamforming method. Thirdly, throughly simulation, we showed that system performance of proposed method compare proposal method with general method. It have improved resolution of estimation target to good performance more proposed method than general method.

• Journal of information and communication convergence engineering
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• v.14 no.4
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• pp.268-271
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• 2016

An efficient inductive switching noise suppression technique for mixed-signal integrated circuits (ICs) using standard CMOS digital technology is proposed. The proposed design technique uses a parallel RC circuit, which provides a damping path for the switching noise. The proposed design technique is used for designing a mixed-signal circuit composed of a ring oscillator, a digital output buffer, and an analog noise sensor node for $0.13-{\mu}m$ CMOS digital IC technology. Simulation results show a 47% reduction in the on-chip inductive switching noise coupling from the noisy digital to the analog blocks in the same substrate without an additional propagation delay. The increased power consumption due to the damping resistor is only 67% of that of the conventional source damping technique. This design can be widely used for any kind of analog and high frequency digital mixed-signal circuits in CMOS technology

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.181-182
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• 2008

In this paper, an cost-effective system architecture is proposed to implement digital predistortion scheme for linearizing the PA amplifing TDD wideband signal. To make digital predistorted signal for compensating nonlinearity of PA, a dedicated ADC and a frequency-down converter are necessary. Proposed scheme is based on the TDD feature that the RF receiver frontend is idle state during the downlink signal processing time and utilize them to make the digital predistorted signal for PA.

• Journal of Satellite, Information and Communications
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• v.8 no.2
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• pp.88-93
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• 2013

The wideband chirp signal generator to enhance the resolution of synthetic aperture radar of obtaining the earth observation image is needed. This paper deals with designing, manufacturing and testing the wideband digital chirp signal generator having high resolution for LEO earth observation satellite. The wideband digital chirp signal generator is implemented with the memory-map based structure which is mostly applied in the satellite, and consists of the digital module to generate the digital chirp signal and the RF module to perform the quadrature modulation. The I/Q signals stored in the memory of the digital module are D/A converted and delivered to be quadrature modulated with the reference signal of 1275 MHz in the RF module. Furthermore, the test bench and GUI to validate the signal generator function are also developed. It is found that the requirement of 144 MHz bandwidth for the digital chirp signal generator is well met. Finally it is noteworthy that the distortion occurred in the chirp signal generator was compensated by the pre-distortion compensation.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2126-2130
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• 2003

In the integrated systems, that is integrated digital TV(DTV) internet and home automation, like home server, is needed integration of digital TV video signal and computer graphic signal. The graphic signal is operating at the high speed and has time-divide-stream. So the re-request of data is not easy at the time of error detection. therefore EDAC algorithm is efficient. In this paper, we show a scheme, that is integration of graphic and dtv format signal for DTV monitor display. This paper also presents the efficiency error detection auto correction(EDAC) for conversion of graphics signal to DTV video signal. A presented EDAC algorithms use the modified hamming code for enhancing video quality and reliability. A EDAC algorithm of this paper can detect single error, double error, triple error and more error for preventing from incorrect correction. And it is not necessary an additional memory. In this paper The comparison between digital TV video signal and graphic signal, a EDAC algorithm and a design of conversion graphic signal to DTV signal with EDAC function in DTV system is described.