• ETRI Journal
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• v.26 no.1
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• pp.53-56
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• 2004

In this letter, we propose a novel design scheme for an optimal non-uniform planar array geometry in view of maximum side-lobe reduction. This is implemented by a thinned array using a genetic algorithm. We show that the proposed method can maintain a low side-lobe level without pattern distortion during beam steering.

• ETRI Journal
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• v.28 no.1
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• pp.9-16
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• 2006

In this paper, we analyzed and measured the electrical crosstalk characteristics of a 1.25 Gbps triplexer module for Ethernet passive optical networks to realize fiber-tothe-home services. Electrical crosstalk characteristic of the 1.25 Gbps optical triplexer module on a resistive silicon substrate should be more serious than on a dielectric substrate. Consequently, using the finite element method, we analyze the electrical crosstalk phenomena and propose a silicon substrate structure with a dummy ground line that is the simplest low-crosstalk layout configuration in the 1.25 Gbps optical triplexer module. The triplexer module consists of a laser diode as a transmitter, a digital photodetector as a digital data receiver, and an analog photodetector as a cable television signal receiver. According to IEEE 802.3ah and ITU-T G.983.3, the digital receiver and analog receiver sensitivities have to meet -24 dBm at $BER=10^{-12}$ and -7.7 dBm at 44 dB SNR. The electrical crosstalk levels have to maintain less than -86 dB from DC to 3 GHz. From analysis and measurement results, the proposed silicon substrate structure that contains the dummy line with $100\;{\mu}m$ space from the signal lines and 4 mm separations among the devices satisfies the electrical crosstalk level compared to a simple structure. This proposed structure can be easily implemented with design convenience and greatly reduce the silicon substrate size by about 50 %.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.718-727
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• 2014

In a wireless communications system, a predistorter is often used to compensate for the nonlinear distortions that result from operating a power amplifier near the saturation region, thereby improving system performance and increasing the spectral efficiency for the communication channels. This paper presents a new VLSI design for the polynomial digital predistorter (DPD). The proposed DPD uses a Coordinate Rotation Digital Computing (CORDIC) processor and a PD process with a fully-pipelined architecture. Due to its simple and regular structure, it can be a competitive design when compared to existing polynomial-type and approximated DPDs. Implementing a fifth-order distorter with the proposed design requires only 43,000 logic gates in a $0.35{\mu}m$ CMOS standard cell library.

• Proceedings of the Korea Society for Simulation Conference
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• 2005.05a
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• pp.34-39
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• 2005

The progress of silicon technology enables to implement a highly complex digital system on a given chip area. However, even the modern design environment is not so efficient to catch up with the progress of process technology. Design reuse is a promising approach to designing such a complex system in an efficient way. However, the rigidness and inflexibility of a model has been an obstacle to design reuse. This paper proposes a high-level model management methodology by introducing attributed AND-OR graph(AOG), a (formal semantics for representing the possible structure of a model. Using the formalism enables a designer to extract, extend and reuse the pre-modeled and pre-verified design. A complete process of constructing a cache operational model, extending the model and extracting executable models is exemplified to show effectiveness of the proposed framework.

• The Journal of the Korea Contents Association
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• v.10 no.5
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• pp.124-134
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• 2010

This study has began to develop a method for the student major in visual communication and media design to allow them approach to digital contents design developing process in easier and more effective way. The aim of this study is to investigate the potential significance of developing analogue contents design as one of the preliminary works in the digital contents design developing process. The results revealed that designing analogue contents as one of the preliminary works of the digital contents design is: Firstly, it reduces students' mental pressure in organizing the structure of overall information clusters at the phase of information architecture. Secondly, it helps students to find out the object and the preferable form of information design intuitively in the process of information design. Lastly, it is helpful for students to understand the characteristics of digital contents design through clarifying the differences between analogue contents design and digital contents design.

• Journal of Korea Game Society
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• v.5 no.3
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• pp.17-24
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• 2005

The interaction property of digital media have changed traditional storytelling into a new concept, digital-storytelling, which has been widely accepted. Nowadays open-ended game storytelling, which different from story design of movie or animation, is chosen for the development of RPG. It can make infinite stories according to player character's decision. In this paper, we propose a game storytelling structure focused on the characters for RPG, and analyze how characters designed with various story-values interact with background stories and events in the cyber game world through case studies. This research is necessary to design predictable game mechanics and provide methods to control game play in case of special-purpose game.

• ETRI Journal
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• v.26 no.6
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• pp.545-554
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• 2004

In this paper, we propose an efficient design method for area optimization in a digital filter. The conventional methods to reduce the number of adders in a filter have the problem of a long critical path delay caused by the deep logic depth of the filter due to adder sharing. Furthermore, there is such a disadvantage that they use the transposed direct form (TDF) filter which needs more registers than those of the direct form (DF) filter. In this paper, we present a hybrid structure of a TDF and DF based on the flattened coefficients method so that it can reduce the number of flip-flops and full-adders without additional critical path delay. We also propose a resource sharing method and sharing-pattern searching algorithm to reduce the number of adders without deepening the logic depth. Simulation results show that the proposed structure can save the number of adders and registers by 22 and 26%, respectively, compared to the best one used in the past.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1987.04a
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• pp.219-222
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• 1987

A Semi-cusion VLSI Digital Filter Design for TDM/FDM tran-smultiplexer is decribed. Using the polyphase network approach a filter bank composed of only all-pasdigital filter sections was designed. The use of all-pass filters as basic building blocks is shown to provide a Transmultiplexer structure that has low computational requirements low quanization noise and hign modularity. A design of 1st order 2nd All pass filter is done using COMS 2um double metal.

• Journal of information and communication convergence engineering
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• v.8 no.4
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• pp.461-465
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• 2010

This paper describes the design method of Time-to-Digital Converter(TDC) to obtain the constant delay time and good reliability. The reliability property is described with delay elements. In TDC the time signal is converted to digital value which is based on delay elements for the time interpolation. To obtain the constant delay time, the first and the last delay elements have different structure compared to the middle delay elements. In the first and the last delay elements, the driving ability could be controlled for the different delay time. The delay element can be designed by analog and digital devices. The delay time of the element using analog devices is not sensitive to process parameters than that of the element using digital devices. And the TDC circuit by the elements using analog devices shows better reliability than that by the elements using digital devices also.

• Proceedings of the Korea Society of Design Studies Conference
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• 2003.05a
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• pp.268-269
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• 2003