• Journal of Institute of Control, Robotics and Systems
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• v.22 no.9
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• pp.686-692
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• 2016

A Crimp Force Monitor (CFM) is equipment for detecting crimp errors by analyzing crimp signals obtained from force and strain sensors. The analysis is commonly performed by aligning a measured crimp signal with a reference signal and comparing their difference. Current analysis methods often suffer from wrong alignments that result in false negative detections. This paper presents a new crimp signal analysis method in CFM. First, a falling edge alignment is proposed that matches falling edges of the measured and the reference signals by minimizing the absolute difference summation. Second, a signal parameter error is introduced to evaluate the crimp quality difference between the measured signal and the reference. For calculating the signal parameter error, part of a signal is identified and divided into several regions to maximize the signal parameter errors. Experiments showed that the proposed method can improve the signal alignment and accurately detect bad crimps especially with the strain sensor.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.8
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• pp.1518-1527
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• 1994

An algorithm for BPSK demodulation of which channel is an electric distribution line is developed, and realized in this paper. To realize the BPSK demodulation by microprocessor, BPSK signal that is received through the distribution line must be converted to digital signal. A hardware which converts BPSK signal to digital one has been designed in this paper, and an algorithm for BPSK demoduation of which channel is distribution line has been also developed in algorithm for BPSK demoduation of which channel is distribution line has been also developed in this paper by paying the attention to the fact that a modulated point appears up and down according to the rising edge and falling edge of the modulated binary signal if the carrier frequency is even times to the modulated binary signal, and by paying the attention to the fact that the signal duration or modulated point is twice of the other point. The microprocessor demodulation system with the algorithm has been realized. The system proved to have 0.02%(or less) bit error rate in real BPSK demodulation.

• Transactions of the Korean Society of Automotive Engineers
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• v.3 no.6
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• pp.224-237
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• 1995

An ECU(Electronic Control Unit) with 16 bit microcomputer has been developed. This system includes hardware and software for more precise control on fuel injection, ignition timing, and idle speed. This control system employs an air flow sensor of the hot wire type, a direct ignition system, an idle speed control system using a solenoid valve, and a crank angle sensor. Especially, the crank angle sensor provides two separate signals: One is the position signal(POS) which indicates 180 degree pulses per revolution, and the other is the reference signla(REF) that represents each cylinder individually. The conventional engine control system requires at least two engine revolutions in order to identify the cylinder number. However, the developed engine control system can recognize the cylinder number within a quarter of an engine revolution. Therfore, the developed engine control system has been able to control fuel injection and ignition timing more quickly and accurately, Furthermore, the number of misfire reduces during the cold start.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11C
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• pp.1152-1160
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• 2003

Start The current paper proposes an improved HD(High Definition) monitor that can support a signal input with various resolutions. Due to the inadequate performance of the built-in digital PLL(Phase-locked Loop) of an ADC(Analog to Digital Converter) and poor tolerance of ADC ICs, there are problems in the stable processing of synchronization signals with various input signals. Accordingly, the proposed synchronization signal optimization technique regenerates the horizontal synchronization signal in the vertical blanking interval based on the regularity of the synchronization signal, i.e. the timing of the falling edge signal remains constant, thereby solving the above problem and minimizing the interference of the system. As a result, the proposed system can stabilize various synchronization signals with different resolution modes.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.10
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• pp.1123-1130
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• 2015

Network on a chip(NoC) is a communication subsystem between intellectual property(IP) cores in a SoC and improves high performance in the scalability and the power efficiency compared with conventional buses and crossbar switches. NoC needs a synchronizer to overcome the metastability problem between data links. This paper presents a new mesochronous synchronizer(MS) which is composed of selection window generator, selection signal generator, and data buffer. A delay line circuit is used to build selection window in selection window generator based on the delayed clock cycle of transmitted clock and the transmitted clock is compared with local clock to generate a selection signal in the SW(selection window). This MS gets rid of the restriction of metastability by choosing a rising edge or a falling edge of local clock according to the value of selection signal. The simulation results show that the proposed MS operates correctly for all phase differences between a transmitted clock and a local clock.

• ETRI Journal
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• v.35 no.3
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• pp.459-468
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• 2013

A novel integrated laser, that is, a distributed reflector laser diode integrated with an electroabsorption modulator, is proposed to improve the output efficiency, single-mode stability, and chirp. The proposed laser can be realized using the selective metalorganic vapor phase epitaxy technique (that is, control of the width of the insulating mask), and its fabrication process is almost the same as the conventional electroabsorption modulated laser (EML) process except for the asymmetric coupling coefficient structure along the cavity. For our analysis, an accurate time-domain transfer-matrix-based laser model is developed. Based on this model, we perform steady-state and large-signal analyses. The performances of the proposed laser, such as the output power, extinction ratio, and chirp, are compared with those of the EML. Under 10-Gbps NRZ modulation, we can obtain a 30% higher output power and about 50% lower chirp than the conventional EML. In particular, the simulation results show that the chirp provided by the proposed laser can appear to have a longer wavelength side at the leading edge of the pulse and a shorter wavelength side at the falling edge.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.1A
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• pp.70-75
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• 2005

The efficient hardware design of the the algorithm is important in wide variety of DSP. One example is OFDM(Orthogonal Frequency Division Multiplexing) based WLAN(Wireless Local Area Network) systems which place high requirements on throughput and power consumption on FFT. The output RAM is composed of two banks of $64{\times}W.$ The banks are swapped immediately following the falling edge or the start signal strobe. This bank swapping allows 64-Point FFT to continue Processing samples and to continue filling the alternative bank, without affecting the data flow outputs.

• Journal of Biomedical Engineering Research
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• v.25 no.2
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• pp.137-144
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• 2004

ECG signals are often contaminated with high-frequency noise such as muscle artifact, power line interference, and others. In the ECG signal processing, especially during a pre-processing stage, numerous noise removal techniques have been used to reduce these high-frequency noise without much distorting the original signal. This paper proposes a new type of digital filter with a continuously variable cutoff frequency to improve the signal quality This filter consists of a cutoff frequency controller (CFC) and variable cutoff frequency lowpass filter (VCF-LPF). From the noisy input ECG signal, CFC produces a cutoff frequency control signal using the signal slew rate. We implemented VCF-LPF based on two new filter design methods called convex combination filter (CCF) and weight interpolation fille. (WIF). These two methods allow us to change the cutoff frequency of a lowpass filter In an arbitrary fine step. VCF-LPF shows an excellent noise reduction capability for the entire time segment of ECG excluding the rising and falling edge of a very sharp QRS complex. We found VCF-LPF very useful and practical for better signal visualization and probably for better ECG interpretation. We expect this new digital filter will find its applications especially in a home health management system where the measured ECG signals are easily contaminated with high-frequency noises .