• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.2
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• pp.727-746
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• 2018

The hash function RIPEMD-160 is a worldwide ISO/IEC standard and the hash function HAS-160 is the Korean hash standard and is widely used in Korea. On the basis of differential meet-in-the-middle attack and biclique technique, a preimage attack on 34-step RIPEMD-160 with message padding and a pseudo-preimage attack on 71-step HAS-160 without message padding are proposed. The former is the first preimage attack from the first step, the latter increases the best pseudo-preimage attack from the first step by 5 steps. Furthermore, we locate the linear spaces in another message words and exchange the bicliques construction process and the mask vector search process. A preimage attack on 35-step RIPEMD-160 and a preimage attack on 71-step HAS-160 are presented. Both of the attacks are from the intermediate step and satisfy the message padding. They improve the best preimage attacks from the intermediate step on step-reduced RIPEMD-160 and HAS-160 by 4 and 3 steps respectively. As far as we know, they are the best preimage and pseudo-preimage attacks on step-reduced RIPEMD-160 and HAS-160 respectively in terms of number of steps.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.5
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• pp.1015-1022
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• 2012

This paper deals with hardware design which unifies MD5 and HAS-160 hash algorithms. Two algorithms get a message with arbitrary length and process message blocks divided into 512 bits each time and output a hash code with a fixed length. MD5 ouputs a hash code of 128 bits and HAS-160 a hash code of 160 bits. The unified hash core designed has 32% of slices overhead compared to HAS-160 core. However, there is only a fixed message buffer space used. The unified hash core which run a step in one clock cycle operates at 92MHz and has performance which digests a message in the speed of 724Mbps at MD5 and 581Mbps at HAS-160 hash mode. The unified hash core which is designed can be applicable to the areas such as E-commerce, data integrity and digital signature.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.913-916
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• 2009

This paper describes a hardware design of hash processor which implements HAS-160 algorithm adopted as a Korean standard. To achieve a high-speed operation with small-area, the arithmetic operation is implemented using a hybrid structure of 5:3 and 3:2 carry-save adders and a carry-select adder. The HAS-160 processor synthesized with $0.35-{\mu}m$ CMOS cell library has 17,600 gates. It computes a 160-bit hash code from a message block of 512 bits in 82 clock cycles, and has 312 Mbps throughput at 50 MHz@3.3-V clock frequency.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.715-722
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• 2010

This paper describes a hardware design of hash function processor which implements Korean Hash Algorithm Standard HAS-160. The HAS-160 processor compresses a message with arbitrary lengths into a hash code with a fixed length of 160-bit. To achieve high-speed operation with small-area, arithmetic operation for step-operation is implemented by using a hybrid structure of 5:3 and 3:2 carry-save adders and carry-select adder. It computes a 160-bit hash code from a message block of 512 bits in 82 clock cycles, and has 312 Mbps throughput at 50 MHz@3.3-V clock frequency. The designed HAS-160 processor is verified by FPGA implementation, and it has 17,600 gates on a layout area of about $1\;mm^2$ using a 0.35-${\mu}m$ CMOS cell library.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.25 no.6
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• pp.1327-1339
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• 2015

This paper surveys structures, features and programming techniques of CNG that is substitution of CAPI in Microsoft, and implements hash provider for support HAS-160 that is one of the Korean hash algorithm. After that, we analysis agility from different perspective based on implemented results, and propose customizing stratagem. Analyzed results of basic concepts and implemented HAS-160 hash provider are expected applying measure for Korean cryptography algorithm in Vista environment. Consequently, we will research secure distribution way due to it is not apply on CNG.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.20 no.2
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• pp.3-14
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• 2010

In this paper, we present the preimage attacks on step-reduced ARIRANG, HAS-160, and PKC98-Hash. We applied Aoki and Sasaki's chunk serach method which they have used in the attack on SHA-0 and SHA-1. Our attacks find the preimages of 35-step ARIRANG, 65-step HAS-160, and 80-step PKC98-Hash. Our results are the best preimage attacks for ARIRANG and HAS-160, and the first preimage attack for PKC98-Hash faster than exhaustive search.

• Proceedings of the Korea Multimedia Society Conference
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• 2002.05c
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• pp.44-48
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• 2002

본 논문에서는 한국형 디지털 서명 표준인 KCDSA에서 사용할 목적으로 개발된 국내 해쉬 함수 표준인 HAS-160 알고리즘을 VLSI 설계하였다. 하나의 단계연산을 하나의 클럭에 동작하고 단계연산의 핵심이 되는 4개의 직렬 2/sup 3/ 모듈러 가산기를 CSA(Carry Save Adder)로 구현하여 캐리 전파시간을 최소로 하고 HAS-160 해쉬 알고리즘의 특징인 메시지 추가생성을 사전에 계산하여 지연시간을 줄이는 설계를 하였다. 설계된 해쉬 프로세서를 0.25 urn CMOS 스탠다드 셀 라이브러리에서 합성한 결과 총 게이트 수는 약 21,000개이고 최대 지연 시간은 5.71 ns로 최대 동작주파수 약 175 MHz서 약 1,093 Mbps의 성능을 얻을 수 있었다.

• Journal of information and communication convergence engineering
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• v.3 no.4
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• pp.205-208
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• 2005

This paper is about the hardware implementation of the Hash algorithm, HAS-160, which is widely used for Internet security and authentication. VHDL modeling was used for its realization and the operation speed has been increased by the optimized scheduling of the operations required for step operations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.1C
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• pp.112-121
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• 2002

In this paper, we present a design of a hash processor for data security systems. Two standard hash algorithms, Sha-1(American) and HAS-1600(Korean), are implemented on a single hash engine to support real time processing of the algorithms. The hash processor can also be used as a PRNG(Pseudo-random number generator) by utilizing SHA-1 hash iterations, which is being used in the Intel software library. Because both SHA-1 and HAS-160 have the same step operation, we could reduce hardware complexity by sharing the computation unit. Due to precomputation of message variables and two-stage pipelined structure, the critical path of the processor was shortened and overall performance was increased. We estimate performance of the hash processor about 624 Mbps for SHA-1 and HAS-160, and 195 Mbps for pseudo-random number generation, both at 100 MHz clock, based on Samsung 0.5um CMOS standard cell library. To our knowledge, this gives the best performance for processing the hash algorithms.

• Journal of Energy Engineering
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• v.23 no.4
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• pp.1-8
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• 2014

For this study, a 160Ah Ni-MH battery is produced with parallel arranged two 80Ah Ni-MH batteries as an unit, in order to start diesel generator(engine) in place of Lead Acid battery or Ni-cd battery which contain indicated toxic pollutant of Environmental pollution, by high capacity Ni-MH battery. And the ternary electrolyte recipe is requested to develop proper electrodes of the 160Ah Ni-MH battery, and then the 160Ah battery can be tested at high rate discharging performance. Zn is added to negative electrode for the improvement of performance. 160Ah Ni-MH battery has been tested in various experiments for diesel engine starting. As the result, diesel engine starting is found successfully.