• Journal of electromagnetic engineering and science
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• v.7 no.4
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• pp.175-182
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• 2007

In this paper, a study on the reflector type frequency doubler, to suppress the undesired harmonics, is presented. A 12 to 24 GHz reflective frequency doubler is simulated and experimented. Design procedure of the frequency doubler with reflector is provided and the frequency doubler with good spectral purity is fabricated successfully. It has harmonic suppression of the $40{\sim}50\;dBc$ in the $1^{st}$ harmonic and the $50{\sim}60\;dB$ in the $3^{rd}$ harmonic with no additional filter. And, it has conversion gain with the input power of 0 dBm over bandwidth of 500 MHz. A NEC's ne71300(N) GaAs FET is used and the nonlinear model(EEFET3) using IC-CAP program is extracted for harmonic load pull simulation. Good agreement between simulated and measured results has been achieved.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.987-994
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• 2010

In this paper, a simple and effective active load-pull method is proposed, and the method to improve the efficiency of X-band power amplifier using harmonic control circuit is presented. The proposed active load-pull system mainly consists of directional coupler, phase shifter, short circuit, and power amplifier, and allows a user to access reflection coefficients near the edge of the Smith chart($\Gamma$=1) easily. The device used in this paper is Mitsubishi's GaAs FET MGF1801, and the operating frequency of the power amplifier is 9 GHz, The amplifier had output power of 21.65 dBm and drain efficiency of 24.9 % at class-A, and had output power of 21.46 dBm and drain efficiency of 53.3 % at class-AB. Harmonic control circuit is designed only second and third harmonic components because of the bandwidth limitation of the microwave components. The drain efficiency is improved as much as 6.4 % compared with class-AB power amplifier.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.12 s.103
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• pp.1186-1193
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• 2005

In this paper, a new 3 dB branch line hybrid using asymmetric spiral-shaped defected ground structure(DGS) microstrip is proposed. The proposed branch line hybrid suppresses the 2nd and the 3rd harmonic component effectively. Also a DGS $\lambda$/4 bias line that can suppress high frequency harmonics as well as low frequency intermodulation component is proposed. With the harmonic termination tuner using the proposed hybrid and the harmonic blocking bias line, the 2nd and the 3rd harmonic components of the fabricated amplifier that operated in IMT-2000 basestation transmitting band were suppressed up 25 dB and 27 dB, respectively. The proposed harmonic load-pull setup of amplifier is more easily accomplished with proposed circuits than the previous.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.1
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• pp.53-61
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• 2014

In this paper, we present the design, fabrication and measurement of high efficiency GaN HEMT power amplifier using harmonic matching technique. In order to achieve high efficiency, harmonic load-pull simulation is performed, that is, the optimum load impedances are determined at $2^{nd}$ and $3^{rd}$ harmonic frequencies as well as at the fundamental. Then, the output matching circuit is designed based on harmonic load-pull simulation. The measurement of the fabricated power amplifier shows the linear gain of 20 dB and $P_{1dB}$(1 dB gain compression point) of 33.7 dBm at 1.85 GHz. The maximum power added efficiency(PAE) of 80.9 % is achieved at the output power of 38.6 dBm, which belongs to best efficiency performance among the reported high efficiency power amplifiers. For W-CDMA input signal, the power amplifier shows a PAE of 27.8 % at the average output power of 28.4 dBm, where an ACLR (Adjacent Channel Leakage Ratio) is measured to be -38.8 dBc. Digital predistortion using polynomial fitting was implemented to linearize the power amplifiers, which allowed about 6.2 dB improvement of an ACLR performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1034-1046
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• 2013

In this paper, a design of a GaN HEMT power amplifier using output matching circuit with arbitrary harmonic impedances is presented. The adopted GaN HEMT device, TGF2023-02 of TriQuint Semiconductor, was packaged in commercial package. The optimal impedances of the GaN HEMT package are extracted from load-pull simulation at package input and output reference planes. The targets of load-pull simulation are the highest output power at fundamental frequency and the highest efficiency at $2^{nd}$ and $3^{rd}$ harmonic frequencies. Because of fixture in the package, the extracted impedances shows arbitrary harmonic impedances. In order to match the optimal impedances, output matchin circuit which has 4 transmission lines is presented. Characteristic impedances and electrical lengths of the transmission lines are mathmatically calculated. The power amplfiier with $54.6{\times}40mm^2$ shows the output power of 8 W at the fundamental frequency of 2.5 GHz, the efficiency above 55 %, and harmonic suppression of above 35 dBc at the $2^{nd}$ and the $3^{rd}$ harmonics.

• Journal of Navigation and Port Research
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• v.28 no.1
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• pp.37-41
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• 2004

In this paper, a reflector type frequency doubler for local oscillator at 24GHz is designed and fabricated with ne71300-N MESFET. Optimum source and load impedances are decided through a multiharmonic load pull simulation technique. A conversion gain can be improved using the reflector and fundamental and third harmonics are well suppressed with open stub of $\lambda$/4 length Measured results show output power at 0dBm of input power is -3.776dBm, conversion gain 0.736dB, harmonic suppression 41.064dBc, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.1
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• pp.102-106
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• 2009

This paper presents the design and optimization of output matching network according to envelope for class F power amplifier(PA) which is to apply to envelope elimination and restoration(EER) transmitter. In this paper, to increase the PAE of class F power amplifier which applies to EER transmitter, the varactor diode has been used on output matching network. As envelope changes, it optimizes constitution of harmonic trap that is short circuit in 2nd-harmonic and is open circuit in 3rd-harmonic. When drain voltage changes from 25 V to 30 V, some percentage is improved in the PAE.put the abstract of paper here.

• Journal of Advanced Navigation Technology
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• v.14 no.1
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• pp.20-26
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• 2010

In this paper, a frequency tripler has been designed with 100mW medium-power using P-HEMT. It is designed to obtain 7.2 GHz frequency at the output that is an integer multiple of 2.4 GHz input frequency by using nonlinear device that produces 3rd harmonic. The frequency tripler is designed by using load-pull simulation. To suppress the 2nd and fundamental, notch filter is used for the frequency tripler. The tripler is designed to obtain about 21dBm output power with 15 dBm input, i.e., 6 dB conversion gain and the suppression of 20 dBc at fundamental, and 30 dBc at the second harmonics.

• 전자공학회논문지 IE
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• v.47 no.3
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• pp.47-52
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• 2010

In this paper, a frequency tripler has been designed with 100mW medium-power using P-HEMT. It is designed to obtain 7.2GHz frequency at the output that is an integer multiple of 2.4GHz input frequency by using nonlinear device that produces 3rd harmonic. The frequency tripler is designed by using load-pull simulation. To suppress the 2nd and fundamental, notch filter is used for the frequency tripler. The tripler is designed to obtain about 21dBm output power with 15dBm input, i.e., 6dB conversion gain and the suppression of 20dBc at fundamental, and 30dBc at the second harmonics.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.4
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• pp.290-298
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• 2018

Herein, an S-band internally-matched power amplifier that shows a power capability of 300 W in a Long Term Evolution(LTE) band 7 is designed and fabricated using a CGHV40320D GaN HEMT from Wolfspeed. Based on the nonlinear model, the optimum source and load impedance are extracted from the source-pull and load-pull simulations at the fundamental and harmonic frequencies, and the harmonic impedance tuning circuits are implemented inside a ceramic package. The internally matched power amplifier, which is fabricated using a thin-film substrate with a high relative permittivity of 40 and an RF35TC PCB substrate, is measured at the pulsed condition with a pulse period of 1 ms and a duty cycle of 10%. The measured results show a maximum output power of 257~323 W, a drain efficiency of 64~71%, and a power gain of 11.5~14.0 dB at 2.62~2.69 GHz. The LTE-based measurement shows a drain efficiency of 42~49% and an ACLR of less than -30 dBc(excluding 2.62 GHz) at an average power of 79 W.