• Journal of the Korean Crystal Growth and Crystal Technology
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• v.18 no.4
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• pp.137-139
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• 2008

Floating zone, neutron transmutation-doped and magnetic Czochralski silicon crystals are being widely used for fabrication power devices. To improve the quality of these devices and to decrease their production cost, it is necessary to use large-diameter wafers with high and uniform resistivity. Recent developments in the crystal growth technology of Czochralski silicon have enable to produce Czochralski silicon wafers with sufficient resistivity and with well-controlled, suitable concentration of oxygen. In addition, using Czoehralski silicon for substrate materials may offer economical benefits, First, Czoehralski silicon wafers might be cheaper than standard floating zone silicon wafers, Second, Czoehralski wafers are available up to diameter of 300 mm. Thus, very large area devices could be manufactured, which would entail significant saving in the costs, In this work, the conventional Czochralski silicon crystals were grown with higher oxygen concentrations using high pure polysilicon crystals. The silicon wafers were annealed by several steps in order to obtain saturated oxygen precipitation. In those wafers high resistivity over $5,000{\Omega}$ cm is kept even after thermal donor formation annealing.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.629-632
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• 1998

This paper presents a new and simple technique to realize high Q inductor on low resistivity silicon wafer with 6 $\Omega$.cm. This technique is very compatible with bipolar and CMOS standard silicon process. By forming the deep and narrow trenches on the low resistivity wafer substrate under inductor pattern, oxidizing and filling with undoped polysilicon, the low resistivity silicon wafer acts as high resistivity wafer being suitable for the fabrication of high Q inductor. By using this technique the quality factor (Q) for 8-turn spiral inductor was improved up to max. 10.3 at 2 ㎓ with 3.0 $\mu\textrm{m}$ of metal thickness. The experiment results show that Q on low resistivity silicon wafer with the trench technique have been improved more than 2 times compared to the conventional low resistivity silicon wafer without trenches.

• Journal of the Korean institute of surface engineering
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• v.51 no.3
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• pp.185-190
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• 2018

Dopant-free silicon heterojunction solar cells using Transition Metal Oxide(TMO) such as Molybdenum Oxide($MoO_X$) and Vanadium Oxide($V_2O_X$) have been focused on to increase the work function of TMO in order to maximize the work function difference between TMO and n-Si for a high-efficiency solar cell. One another way to increase the work function difference is to control the silicon wafer resistivity. In this paper, dopant-free silicon heterojunction solar cells were fabricated using the wafer with the various resistivity and analyzed to understand the effect of n-Si work function. As a result, it is shown that the high passivation and junction quality when $V_2O_X$ deposited on the wafer with low work function compared to the high work function wafer, inducing the increase of higher collection probability, especially at long wavelength region. the solar cell efficiency of 15.28% was measured in low work function wafer, which is 34% higher value than the high work function solar cells.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.62-66
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• 2002

The conventional floating zone(FZ) crystal and Czochralski(CZ) silicon crystal have resistivity variations longitudinally as well as radially The resistivity variations of the conventional FZ and CZ crystal are not conformed to requirement of dopant distribution for power devices and thyristors. These resistivity variations in conventional cystals limits the reverse breakdown voltage that could be achieved and forced designers of high power diodes and thyristors to compromise the desired current-voltage characteristics. So to produce high Power diodes and thyristors, Neutron Transmutation Doping(NTD) technique is the one method just because NTD silicon provides very homogeneous distribution of doping concentration. This procedure involves the nuclear transmutation of silicon to phosphorus by bombardment of neutron to the crystal according to the reaction $^{30}$ Si(n,${\gamma}$)longrightarrow$^{31}$ Silongrightarrow(2.6 hr)$^{31}$ P+$\beta$$^{[-10]}$ . The radioactive isotope $^{31}$ Si is formed by $^{31}$ Si capturing a neutron, which then decays into the stable $^{31}$ P isotope (i.e., the donor atom), whose distribution is not dependent on the crystal growth parameters. In this research, neutron was irradiated on FZ silicon wafers which had high resistivity(1000~2000 Ω cm), for 26 and 8.3hours for samples of HTS-1 and HTS-2, and 13, 3.2, 2.0 hours for samples of IP-1, IP-2 and IP-3, respectively, to compare resistivity changes due to time differences. The designed resistivities were approached, which were 2.l Ωcm for HTS-1, 7.21 Ω cm for HTS-2, 1.792cm for IP-1, 6.83 Ωcm for IP-2, 9.23 Ωcm for IP-3, respectively. Point defects were investigated with Deep Level Transient Spectroscopy(DLTS). Four different defects were observed at 80K, 125K, 230K, and above 300K.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.6
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• pp.271-277
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• 2002

In this paper, a MEMS silicon package is newly designed, fabricated for HMIC, and characterized for microwave and millimeter-wave device applications. The proposed package is fabricated by using two high resistivity silicon substrates and surface/bulk micromachining technology. It has a good performance characteristic such as -20㏈ of $S_11$/ and -0.3㏈ of $S_21$ up to 20㎓, which is useful in microwave region. It has also better heat transfer characteristics than the commonly used ceramic package. Since the proposed silicon MEMS package is easy to fabricate and wafer level chip scale packaging is also possible, the production cost can be much lower than the ceramic package. Since it will be a promising low-cost package for mobile/wireless applications.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.11
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• pp.40-46
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• 2002

A MEMS(Micro Electro Mechanical System) package using a doped-silicon(Si) carrier for coplanar microwave and millimeter-wave integrated circuits is proposed in order to reduce parasitic problems of leakage, coupling and resonance. The proposed carrier scheme is verified by fabrication and measuring a GaAs CPW(Coplanar Waveguide) on the three types of Si-carriers(gold-plated high resistivity, lightly doped, high resistivity). The proposed MEMS package using the lightly doped(15 ${\Omega}{\cdot}$) Si-carrier shows parasitic-free performance since the lossy Si-carrier effectively absorbs and suppresses the resonant leakage.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.49-53
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• 2016

A new large-signal model including the voltage-dependent extrinsic gate capacitance for RF channel distribution effect is developed for a high resistivity(HR) silicon-on-insulator(SOI) RF accumulation-mode MOS varactor. The data of voltage-dependent parameters are extracted by using accurate S-parameter optimization, and empirical model equations are constructed by data fitting process. The RF accuracy of this new model is validated by observing excellent agreements between modeled and measured Y11-parameter data in the wide voltage range up to 20 GHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.9
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• pp.21-27
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• 2015

An improved method based on direct extraction and simultaneous optimization is developed to determine model parameters of symmetric inductors fabricated by the high resistivity(HR) silicon-on-insulator(SOI) RF CMOS process. In order to improve modeling accuracy, several model parameters are directly extracted by Y and Z-parameter equations derived from two equivalent circuits of symmetric inductor and grounded center-tap one, and the number of unknown parameters is reduced using parallel resistance and total inductance equations. In order to improve optimization accuracy, two sets of measured S-parameters are simultaneously optimized while same model parameters in two equivalent circuits are set to common variables.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.12
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• pp.1049-1055
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• 2007

Lots of integration work has been done in order to miniaturize the devices for communication. To do this work, one of key work is to get miniaturized inductor with high Q factor for RF circuitry. However, it is not easy to get high Q inductor with silicon based substrate in the range of GHz. Although silicon is well known for its good electrical and mechanical characteristics, silicon has many losses due to small resistivity and high permittivity in the range of high frequency. MEMS technology is a key technology to fabricate miniaturized devices and LTCC is one of good substrate materials in the range of high frequency due to its characteristics of high resistivity and low permittivity. Therefore, we proposed and studied to fabricate and analyze the inductor on the LTCC substrate with MEMS fabrication technology as the one of solutions to overcome this problem. We succeeded in fabricating and characterizing the high Q inductor on the LTCC substrate and then compared and analyzed the results of this inductor with that on a silicon and a glass substrate. The inductor on the LTCC substrate has larger Q factor value and inductance value than that on a silicon and a glass substrate. The values of Q factor with the LTCC substrate are 12 at 3 GHz, 33 at 6 GHz, 51 at 7 GHz and the values of inductance is 1.8, 1.5, 0.6 nH in the range of 5 GHz on the silicon, glass, and LTCC substrate, respectively.

• Journal of the Korean Vacuum Society
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• v.17 no.1
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• pp.46-50
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• 2008

Optical images on the porous silicon exhibiting Febry-Perot fringe pattern have been prepared by using an electrochemical etching of p-type silicon wafer (boron-doped,<100> orientation, resistivity $0.8{\sim}1.2m{\Omega}-cm$) and beam projector. The images remained in the substrate displayed an optical images correlating to the optical pattern and could be useful for optical data storage. A decrease in the effective optical thickness of the Febry-Perot layers was observed, indicative of a change in refractive index induced by exposing of porous silicon to the white light. This provides the ability to fabricate complex optical encoding in the surface of silicon.