• Title/Summary/Keyword: Hysteresis Circuit

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Hysteresis Reduction in piezoelectric actuator by a charge control method (전하 제어법을 이용한 압전 액추에이터의 이력저감)

  • Jeong Soonjong;Lee Daesu;Song Jaesung;Hong Younpyo;Kang Eungu;Choi Wonjong
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2005.05a
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    • pp.35-39
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    • 2005
  • This paper presents a method to reduce hysteresis in multilayer ceramic actuator by connecting the actuator with a capacitor in a series circuit. The change in hysteresis with respect to the capacitor was examined. $0.2Pb(Mg_{1/3}Nb_{2/3})O_3-0.8Pb(Zr_{0.475}Ti_{0.525})O_3$ ceramic material was used as a piezoelectric material for the actuator. Displacement of the actuator was measured in a capacitive gap sensor measuring system. In case of inserting a capacitor in a total circuit, hysteresis became dramatically decreased, and then finally the hysteresis value can be reduced below $0.2\%$. It was found in this present study that reducing the hysteresis in the actuator is dependent upon the characteristics of the capacitor in total circuit and also operating frequency.

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Hysteresis Current Control with Self-Locked Frequency Limiter for VSI Control (자기동조 주파수 제한기를 갖는 전압원 인버터의 히스테리시스 전류제어)

  • Choe, Yeon-Ho;Im, Seong-Un;Gwon, U-Hyeon
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.1
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    • pp.23-33
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    • 2002
  • A hysteresis control is widely used to control output current of inverter. A hysteresis bandwidth is affected by system parameters such as source voltage, device on/off time, load inductance and resistance. The frequency limiter is used to protect switching devices overload. In the conventional hysteresis controller, a lock-out circuit with D-latch and timer is used to device protection circuit. But switching delay time and harmonic components are appeared in output current. In this paper the performance of lock-out circuit is tested, and new circuit for switching device fault protection is proposed ad it's performance is simulated.

In Memristor Based Differential or Integral Control Circuit, Hysteresis Curve Characteristic Analysis According to Capacitance (멤리스터 기반 미분 및 적분제어 회로에서의 커패시턴스 변화에 따른 히스테리시스 곡선 특성 분석)

  • Choi, Jin-Woong;Mo, Young-Sea;Song, Han-Jung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.10
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    • pp.658-664
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    • 2015
  • This paper presents an electrical feature analysis of hysteresis curves in memristor differential and intergral control circuit. After making macro model of the memristor device, electric characteristics of the model such as time analysis, frequency dependent DC I-V curves were performed by PSPICE simulation. Also, we made a circuit of memristor-capacitor based on nano-wired memristor device and analyzed the simulated PSPICE results. Finally, we proposed a memristor based differential or integral control circuit, analyzed hysteresis curve characteristic in the control circuit.

Comparative Study of Non-Electrochemical Hysteresis Models for LiFePO4/Graphite Batteries

  • Ma, Jiachen;Xie, Jiale;Bai, Kun
    • Journal of Power Electronics
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    • v.18 no.5
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    • pp.1585-1594
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    • 2018
  • The estimation of $LiFePO_4$/graphite battery states suffers from the prominent hysteresis phenomenon between the respective open-circuit voltage curves towards charging and discharging. A lot of hysteresis models have been documented to investigate the hysteresis mechanism. This paper reviews and deeply interprets four non-electrochemical hysteresis models and some improvements. These models can be conveniently incorporated into commonly used equivalent circuit models to reproduce battery behaviors. Through simulation and experimental comparisons of voltage predictions and state-of-charge estimations, the pros and cons of these models are presented.

A Study of Dynamic Characteristic Analysis for Hysteresis Motor Using Permeability and Load Angle by Inverse Preisach Model (역 프라이자흐 모델에 의한 투자율과 부하각을 이용한 히스테리시스 전동기의 동적 특성 해석 연구)

  • Kim, Hyeong-Seop;Han, Ji-Hoon;Choi, Dong-Jin;Hong, Sun-Ki
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.68 no.2
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    • pp.262-268
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    • 2019
  • Previous dynamic models of hysteresis motor use an extended induction machine equivalent circuit or somewhat different equivalent circuit with conventional one, which makes unsatisfiable results. In this paper, the hysteresis dynamic characteristics of the motor rotor are analyzed using the inverse Preisach model and the hysteresis motor equivalent circuit considering eddy current effect. The hysteresis loop for the rotor ring is analyzed under full-load voltage source static state. The calculated hysteresis loop is then approximated to an ellipse for simplicity of dynamic computation. The permeability and delay angle of the elliptic loop apply to the dynamic analysis model. As a result, it is possible to dynamically analyze the hysteresis motor according to the applied voltage and the rotor material. With this method, the motor speed, generated torque, load angle, rotor current as well as synchronous entry time, hunting effect can be calculated.

A Variable Hysteresis Comparator Circuit Controlled by Serial Digital Bits Against Jamming (교란 방어를 위하여 히스테리시스가 시리얼로 제어되는 가변 비교기 회로)

  • Kim, Young-Gi
    • Journal of IKEEE
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    • v.16 no.1
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    • pp.20-27
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    • 2012
  • In order to overcome jamming, a hysteresis tunable monolithic comparator circuit based on a 0.35 ${\mu}m$ CMOS process is suggested, designed, fabricated, measured and analyzed in this paper. To tune the threshold voltage of the hysteresis in the comparator circuit, two external digital bits are used with supply voltage of 3.3V. An improved variable hysteresis comparator circuit controlled by serial digital bits is suggested, designed and simulated to overcome jamming in modern warfare.

A Hysteresis Controllable Monolithic Comparator Circuit for the Radio Frequency Identification (RFID 히스테리시스 제어용 CMOS 비교기 IC 회로)

  • Kim, Young-Gi
    • Journal of IKEEE
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    • v.15 no.3
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    • pp.205-210
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    • 2011
  • A novel hysteresis tunable monolithic comparator circuit based on a 0.35 ${\mu}m$ CMOS process is suggested in this paper. To tune the threshold voltage of the hysteresis in the comparator circuit, two external digital bits are used with supply voltage of 3.3V. The threshold voltage of the suggested comparator circuit is controlled by 234mV by change of 4 digital control bits in the simulation, which is a close agreement to the analytic calculation.

A Magnetic Circuit Model of Inductive Sensor Considering Eddy Currents and Hysteresis (와전류와 히스테리시스를 고려한 유도형 변위 센서의 자기회로 모델 개발)

  • 노명규;정민경;박병철
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2002.05a
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    • pp.267-270
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    • 2002
  • The accuracy and the dynamic bandwidth are the two most important indices that an inductive position sensor is evaluated with. Eddy currents and magnetic hysteresis affect both of these performance indices. As the modulation frequency of the sensor increases to improve the dynamic bandwidth, the effects of eddy currents and hysteresis also increases, which results in the loss of accuracy. In this paper, a magnetic circuit model of the differential inductive sensor is developed. This model includes the effects of hysteresis and eddy currents. Experimental results confirm the validity of the model. The model predicts that the eddy current effects are not significant below the modulation frequency of 50kHz, as long as the lamination thickness is adequate.

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Analysis of Hysteresis Characteristics of Flux-Lock Reactor (자속구속 리액터의 히스테리시스 특성 분석)

  • Lim, Sung-Hun;Choi, Hyo-Sang;Kang, Hyeong-Gon;Ko, Seok-Cheol;Lee, Jong-Hwa;Han, Byoung-Sung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.255-258
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    • 2003
  • The hysteresis characteristics of flux-lock reactor, which is an essential component of flux-lock type superconducting fault current limiter (SFCL), was investigated. The hysteresis loss of iron core in flux-lock type SFCL does not happen due to its winding's structure especially in the normal state. From the equivalent circuit for the flux-lock type SFCL and the fault current limiting experiments, the hysteresis curves could be drawn. Through the hysteresis curves together with the fault current level due to the inductance ratio for the 1st and 2nd winding, the increase of the number of turns in the 2nd winding of the flux-lock type SFCL had a role to prevent the iron core from saturation.

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A Digitally Controllable Hysteresis CMOS Monolithic Comparator Circuit (히스테리시스가 디지털로 제어되는 CMOS 비교기 IC 회로)

  • Kim, Young-Gi
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.11
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    • pp.37-42
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    • 2010
  • A novel hysteresis tunable monolithic comparator circuit based on a $0.35{\mu}m$ CMOS process is suggested, designed, fabricated, measured and analyzed in this paper. To tune the threshold voltage of the hysteresis in the comparator circuit, two external digital bits are used with supply voltage of 3.3V.