• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.299.2-299.2
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• 2013

We investigated the potassium remaining on a crystalline silicon solar cell after potassium hydroxide (KOH) etching and its effect on the lifetime of the solar cell. KOH etching is generally used to remove the saw damage caused by cutting a Si ingot; it can also be used to etch the rear side of a textured crystalline silicon solar cell before atomic layer-deposited Al2O3 growth. However, the potassium remaining after KOH etching is known to be detrimental to the efficiency of Si solar cells. In this study, we etched a crystalline silicon solar cell in three ways in order to determine the effect of the potassium remnant on the efficiency of Si solar cells. After KOH etching, KOH and tetramethylammonium hydroxide (TMAH) were used to etch the rear side of a crystalline silicon solar cell. To passivate the rear side, an Al2O3 layer was deposited by atomic layer deposition (ALD). After ALD Al2O3 growth on the KOH-etched Si surface, we measured the lifetime of the solar cell by quasi steady-state photoconductance (QSSPC, Sinton WCT-120) to analyze how effectively the Al2O3 layer passivated the interface of the Al2O3 layer and the Si surface. Secondary ion mass spectroscopy (SIMS) was also used to measure how much potassium remained on the surface of the Si wafer and at the interface of the Al2O3 layer and the Si surface after KOH etching and wet cleaning.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2003.05a
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• pp.448-451
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• 2003

This study describes a new maskless nano-fabrication technique of Si (100) using the combination of nanometer-scale mechanical forming by nano-indenter XP and KOH wet etching. First the surface of a Si (100) specimen was machined by using the nano-machining system, which utilizes the mechanism of the nano-indenter XP. Next, the specimen was etched by KOH solution. After the etching process, the convex structure or deeper hole is made because of masking or promotion effect of the affected layer generated by nano-machining. On the basis of this interesting fact, some sample structures were fabricated.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.10
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• pp.779-783
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• 2011

The morphology of etch pits in commercial 4H-SiC epi-wafer were investigated by molten-KOH etching. The etching process was optimized in $525{\sim}570^{\circ}C$ at 2~10 min and the novel type of etch pits was revealed. This type of etch pits have been considered as TED (threading edge dislocation) II, its origin and nature, however, are not reported yet. In this work, the morphology and evolution of etch pits during epitaxial growth were analyzed and the different behavior between TED and TEDII was discussed.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.3
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• pp.65-71
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• 1999

The effects of mask materials and etching solutions on the dimensional accuracy of V-groove were studied for the alignment between optoelectronic devices and optical fibers in optical packaging. PECVD nitride, LPCVD nitride, or thermal oxide($SiO_2$) was used as a mask material. The anisotropic etching solution was KOH(40wt%) or the mixture of KOH and IPA. LPCVB nitride has the best etching selectivity and thermal oxide was etched most rapidly in KOH(40wt%) at $85^{\circ}C$ among the mask materials studied here. The V-groove size enlarged than the designed value. This phenomenon was due to the undercutting benearth the mask layer from the etching toward Si (111) plane. The etch rate of (111) plane wart 0.034 - 0.037 $\mu\textrm{m}$/min in KOH(40wt%). This rate was almost same regardless of mask materials. When IPA added to KOH(40wt%), the etch rate of (100) plane and (111) plane decreased, but etching ratio of (100) to (111) plane increased. Consequently, the undercutting phenomenon due to etching toward (111) plane decreased and the size of V-groove could be controlled more accurately.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.123-124
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• 2006

본 연구에서는 KOH 용액을 사용한 Si 습식 이방성 식각실험 진행 후, 나타나는 표면의 거친 현상을 완화하는 데에 중점을 두고 연구를 진행하였다. 이를 위해 $SiO_2$ 웨이퍼 위에 Photo-lithography 공정으로 형성시킨 PMER 패턴을 Mask로 사용하여 HF 용액으로 $SiO_2$를 식각시켰으며, 형성된 $SiO_2$를 Mask로 사용하여 KOH 용액으로 Si을 식각시켰다. 이 때, KOH와 혼합하는 용액으로 IPA와 Ethan이을 각각 사용하여 실험을 진행하였으며, ESEM을 이용하여 표면을 비교하였다.

• Journal of the Semiconductor & Display Technology
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• v.6 no.3
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• pp.61-64
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• 2007

V-groove device was fabricated for precision coupling of planar optical splitter and optical fibers. V-groove was made through select wet etching of Si wafer by using KOH solution. Etching rate and surface roughness were checked, changing KOH composition(10, 20, 30, 33, 40 wt.%) and etching temperature (50, 60, 70, $80^{\circ}C$) to fabricate V-groove device effectively. Etching rate was the fastest as $1.84\;{\mu}m/min$ in case of etching by 20 wt.% KOH on $80^{\circ}C$, surface roughness was the best in case of etching by 33 wt. % KOH on $80^{\circ}C$.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.4
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• pp.19-23
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• 2012

Silicon substrate for light emitting diodes (LEDs) has been the tendency of LED packaging for improving power consumption and light output. In this study, a low cost and high throughput Si through via fabrication has been demonstrated using a wet etching process. Both a wet etching only process and a combination of wet etching and dry etching process were evaluated. The silicon substrate with Si through via fabricated by KOH wet etching showed a good electrical resistance (${\sim}5.5{\Omega}$) of Cu interconnection and a suitable thermal resistance (4 K/W) compared to AlN ceramic substrate.

• Journal of the Semiconductor & Display Technology
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• v.2 no.4
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• pp.37-40
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• 2003

We have studied micro-machining technologies to fabricate parts and sensors used in the semiconductor equipment. The studies were based on the silicon integrated circuit processes, and composed of the anisotropic etching of single crystal silicon to fabricate a membrane structure for hot and cold junctions in the infrared absorber. KOH and TMAH were used as etching solutions for the anisotropic wet etching for membrane structure formation. The etching characteristic was observed for the each solution, and etching rate was measured depending upon the temperature and concentration of the etching solution. The different characteristics were observed according to pattern directions and etchant concentration. The pattern was made to incline $45^{\circ}$ on the primary flat, and optimum etching property was obtained in the case of 30 wt% and $90^{\circ}C$ of KOH etching solution for the formation of the membrane structure.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.7 no.3
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• pp.449-455
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• 1997

The anisotropic etching behavior of single crystal silicon were studied in aqueous KOH solution. N-type (100) oriented single crystal silicon wafers were used for the study, and the $SiO_2$ layer, whose etching rate is known to be much slower than that of silicon in the KOH solution, was used as a mask for the silicon etching. The silicon etching rate and the etching properties are shown to be a function of etchant temperature uniformity, circulation speed, and circulation direction of the etchant as well as the etchant concentration and the temperature. The etching rate is increased as the temperature is increased from $10\mu \textrm{m}/hr$ to $250\mu \textrm{m}/hr$ in the range of $50^{\circ}C~105^{\circ}C$. Hillock density and height is observed to be correlated with the etchant concentration and the etch temperature. The variation of the hillock density was explained by the ratio between the etching rate of (100) orientation and that of (111) orientation.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.11a
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• pp.441-442
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• 2010