• 전자공학회논문지C
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• 제36C권7호
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• pp.10-16
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• 1999

본 논문은 FCSR(Freedback Control Swing voltage Reduction) 방식을 이용하여 bus 구동전압을 수백 mV이내로 줄일 수 있는 구동기에 대한 내용을 다루고 있다. 이는 MDL 구조와 같이 대용량, 대단위 bus에서의 전력소모를 줄이기 위한 연구로 FCSR은 dual-line bus와 bus precharging을 기본구조로 채택하고 있다. Bus 환경이 변화함에 따라 일정한 구동전압을 유지하기 위하여 구동기의 크기를 자동적으로 조절할 수 있도록 구동기와 bus를 모델링 하였고 또한 odd mode로 동작하는 이웃하는 선간의 커플링 영향을 평행 전류원으로 모델링하여 선간간섭(crosstalk) 영향을 분석하였다. 현대 0.8um 공정으로 제작된 chip은 bus를 600mV로 구동하도록 설계되었으며 테스트결과 3.3V에서 70Mhz로 동작 가능하다. Hspice 시뮬레이션으로 FCSR은 3.3V에서 250Mhz의 동작이 가능하다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2014년도 추계학술대회 논문집
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• pp.66-67
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• 2014

Stabilization of the DC bus voltage is an important task in DC-AC microgrid system with renewable energy source such as solar system. A battery energy storage system (BESS) has become a general solution to stabilize the DC-bus voltage in DC-AC microgrid. This paper develops the analog BESS controller which requires neither computation nor dc-bus voltage measurement, so that the system can be implemented simply and easily. Even though others methods can stabilize and control the DC-bus voltage, it has complicated structure in control and low adaptive capability. The proposed topology is simple but is able to compensate the solar source variation and stabilize the DC-bus voltage under any loads and distributed generation (DG) conditions. In addition, the design of analog controller is presented to obtain a robust system. In order to verify the effectiveness of the proposed control strategy, simulation is carried out by using PSIM software.

• Journal of Power Electronics
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• 제15권3호
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• pp.806-818
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• 2015

Based on the inherent relationship between dc-bus voltage and grid feeding active power, two dc-bus voltage regulators with different references are adopted for a grid-connected PV inverter operating in both normal grid voltage mode and low grid voltage mode. In the proposed scheme, an additional dc-bus voltage regulator paralleled with maximum power point tracking controller is used to guarantee the reliability of the low voltage ride-through (LVRT) of the inverter. Unlike conventional LVRT strategies, the proposed strategy does not require detecting grid voltage sag fault in terms of realizing LVRT. Moreover, the developed method does not have switching operations. The proposed technique can also enhance the stability of a power system in case of varying environmental conditions during a low grid voltage period. The operation principle of the presented LVRT control strategy is presented in detail, together with the design guidelines for the key parameters. Finally, a 3 kW prototype is built to validate the feasibility of the proposed LVRT strategy.

• 대한전자공학회논문지SD
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• 제39권2호
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• pp.56-62
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• 2002

문턱전압 스윙 드라이버(threshold voltage swing driver)와 이중 감지 증폭기 리시버(dual sense amplifier receiver)를 가진 새로군 고속 저전압 스윙 온 칩 버스 (on-chip BUS)를 제안하였다. 문턱전압 스윙 드라이버는 버스에서의 전압상승 시간을 CMOS 인버터(inverter) 드라이버에서의 약 30% 이내로 줄여주고, 이중 감지 증폭기 리시버는 감지 증폭기 리시버를 사용하는 기존의 저전압 스윙 버스들의 데이터 전송량을 두 배 향상시켜 준다. 문턱전압 스윙 드라이버와 이중 감지 증폭기 리시버를 모두 사용할 경우, 온 칩 버스에서 사용하는 기존의 CMOS 인버터와 비교하여 제안된 방식은 약 60%의 속도 증가와 75%의 소모전력 감소를 얻는다.

• 한국정보통신학회논문지
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• 제13권12호
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• pp.2633-2640
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• 2009

본 논문에서는 터치스크린 컨트롤러용 IC를 위한 저면적, 저전력, 고속 EEPROM 회로 설계기술을 제안하였다. 저면적 EEPROM 기술로는 SSTC (Side-wall Selective Transistor Cell) 셀을 제안하였고 EEPROM 코어회로에서 반복되는고전압 스위칭 회로를 최적화하였다. 저전력 기술은 디지털 Data Bus 감지 증폭기 회로를 제안하였다. 그리고 고속 EEPROM 기술로는 Distributed DB 방식이 적용되었으며, Dual Power Supply를 사용하여 EEPROM 셀과 고전압 스위칭 회로의 구동전압은 로직전압 VDD(=1.8V)보다 높은 전압인 VDDP(=3.3V)를 사용하였다. 설계된 128Kb EEPROMIP(Intellectual Property)의 레이아웃 면적은 $662.31{\mu}m{\times}1314.89{\mu}m$이다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 춘계학술대회 논문집 전력기술부문
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• pp.74-76
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• 2001

When a Bus voltage is low, the Load-Flour is generally blown up. If Bus voltage is normalized. the convergence of Load-flow is improved. This paper introduces virtual bus with tap. In that case, the Bus admittance will be considered. And the convergence of Load-Flow in applying virtual bus is debated.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 춘계학술대회 논문집 전력기술부문
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• pp.7-9
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• 2001

Many developing countries has been voltage unstable and the inter- change capability in Korea is limited by voltage instability. In analyzing voltage stability, load model has been considered as constant power, but actual loads vary as voltage changes. In order to incorporating voltage-dependent load model. we need the low-side of P-V curve that can not be obtained by general load flow algorithm. This paper proposes a modified GCF algorithm to obtain a full low-side of P-V curve and a accurate voltage assessment index considering load model. 5-bus sample system and 19-bus real power system are applied to simulate the proposed GCF. Also. the effect of reactive power compensation is illustrated in same systems.

• 항공우주기술
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• 제9권2호
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• pp.57-62
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• 2010

저궤도 인공위성에서 SAR 위성 탑재체의 전류 소모량이 약 150A로 예측된다. 이러한 높은 전류 소모는 배터리-위성버스-탑재체로 이루어진 인터페이스에서 전압 강하를 유기하여 위성 본체의 전장품과 탑재체의 동작 전압을 낮추게 되어 정상 동작을 보장하지 못하게 된다. 따라서, 탑재체 동작에 따른 버스 전압과 탑재체 입력 전압 강하의 예측이 반드시 필요하다. 본 해석에서는 전압강하의 요인이 될 수 있는 하니스 및 접촉 저항에 대한 worst case analysis를 수행하여 탑재체 동작시 발생할 수 있는 전압 강하를 예측한다.

• Journal of Power Electronics
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• 제16권4호
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• pp.1256-1267
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• 2016

Distributed stray inductance exerts a significant influence on the turn-off voltages of power switching devices. Therefore, the design of low stray inductance bus bars has become an important part of the design of high-power converters. In this study, we first analyze the operational principle and switching transient of a T-type converter. Then, we obtain the commutation circuit, categorize the stray inductance of the circuit, and study the influence of the different types of stray inductance on the turn-off voltages of switching devices. According to the current distribution of the commutation circuit, as well as the conditions for realizing laminated bus bars, we laminate the bus bar of the converter by integrating the practical structure of a capacitor bank and a power module. As a result, the stray inductance of the bus bar is reduced, and the stray inductance in the commutation circuit of the converter is reduced to more than half. Finally, a 10 kVA experimental prototype of a T-type converter is built to verify the effectiveness of the designed laminated bus bar in restraining the turn-off voltage spike of the switching devices in the converter.

• Journal of Power Electronics
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• 제17권5호
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• pp.1244-1255
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• 2017

The space vector pulse width modulation (SVPWM) technique is a popular PWM method for medium voltage drive applications. Conventional SVPWM (CSVPWM) and bus clamped SVPWM (BCSVPWM) are the most common SVPWM techniques. This paper evaluates the performance of various advanced BCSVPWM strategies in terms of their harmonic distortion and switching loss based on a uniform frame work. A uniform frame work, pulse number captures the performance parameter variations of different SVPWM strategies for various number of samples with heterogeneous pulse numbers. This work compares different advanced BCSVPWM techniques based on the modulation index and location of the clamping position (zero vector changing angle ) of a phase in a line cycle. The frame work provides a fixed fundamental frequency of 50Hz. The different BCSVPWM switching strategies are implemented and compared experimentally on a 415V, 2.2kW, 50Hz, 3-phase induction motor drive which is fed from an IGBT based 2 KVA voltage source inverter (VSI) with a DC bus voltage of 400 V. A low cost PIC microcontroller (PIC18F452) is used as the controller platform.