• Title/Summary/Keyword: MFIS structure

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Formations and properties of MFIS structure using $LiNbO_3/Si_3N_4$ structure ($LiNbO_3/Si_3N_4$ 구조를 이용한 MFIS 구조의 형성 및 특성)

  • 김용성;정상현;정순원;이남열;김진규;김광호;유병곤;이원재;유인규
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.221-224
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    • 2000
  • We have successfully demonstrated metal-ferroel-ectric-insulator-semiconductor (MFIS) devices using Al/LiNbO$_{3}$/SiN/Si structure. The SiN thin films were made into metal -insulator- semiconductor (MIS) devices by thermal evaporation of aluminum source in a dot away on the surface. The interface property of MFIS from 1MHz & quasistatic C-V is good and the memory window width is about 1.5V at 0.2V/s signal voltage sweep rate. The gate leakage current density of MFIS capacitors using a aluminum electrode showed the least value of 1x10$^{-8}$ A/$\textrm{cm}^2$ order at the electric field of 300㎸/cm. And the XRD patterns shows the probability of applications of LN for MFIS devices for FeRAMs on amorphous SiN buffer layer.

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Effect of the MgO buffer layer for MFIS structure using the BLT thin film (BLT 박막을 이용한 MFIS 구조에서 MgO buffer layer의 영향)

  • Lee, Jung-Mi;Kim, Kyoung-Tae;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.23-26
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    • 2003
  • The BLT thin film and MgO buffer layer were fabricated using a metalorganic decomposition method and the DC sputtering technique. The MgO thin film was deposited as a buffer layer on $SiO_2/Si$ and BLT thin films were used as a ferroelectric layer. The electrical of the MFIS structure were investigated by varying the MgO layer thickness. TEM showsno interdiffusion and reaction that suppressed by using the MgO film as abuffer layer. The width of the memory window in the C-Y curves for the MFIS structure decreased with increasing thickness of the MgO layer Leakage current density decreased by about three orders of magnitude after using MgO buffer layer. The results show that the BLT and MgO-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

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Characterization of Pt/BLT/CeO2/Si Structures using CeO2 Buffer Layer (CeO2Buffer Layer를 이용한 Pt/BLT/CeO2/Si 구조의 특성)

  • 이정미;김경태;김창일
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.10
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    • pp.865-870
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    • 2003
  • The MFIS (Metal-Ferroelectric-Insulator-Semiconductor) capacitors were fabricated using a metalorganic decomposition method. Thin layers of CeO$_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the CeO$_2$ layer. The morphology of films and the interface structures of the BLT and the CeO$_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 2.82 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

Effect of ZrO2 Buffer Layers for Pt/Bi3.25La0.75Ti3O12/ZrO2/Si (MFIS)-FET Structures (Pt/Bi3.25La0.75Ti3O12/ZrO2/Si (MFIS)-FET 구조를 위한 ZrO2 Buffer Layer의 영향)

  • Kim, Kyoung-Tae;Kim, Chang-Il
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.5
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    • pp.439-444
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    • 2005
  • We investigated the structural and electrical properties of BLT films grown on Si covered with $ZrO_{2}$ buffer layer. The BLT thin film and $ZrO_{2}$ buffer layer were fabricated using a metalorganic decomposition method. The electrical properties of the MFIS structure were investigated by varying thickness of the $ZrO_{2}$ layer. AES and TEM show no interdiffusion and reaction that suppressed using the $ZrO_{2}$ film as a buffer layer The width of the memory window in the C-V curves for the MFIS structure decreased with increasing thickness of the $ZrO_{2}$ layer. It is considered that the memory window width of MFIS is not affected by remanent polarization. Leakage current density decreased by about four orders of magnitude after using $ZrO_{2}$ buffer layer. The results show that the $ZrO_{2}$ buffer layers are prospective candidates for applications in MFIS-FET memory devices.

Characteristics of MFIS using Pt/BLT/$CeO_2$/Si structures (Pt/BLT/$CeO_2$/Si 구조를 이용한 MFIS의 특성)

  • Lee, Jung-Mi;Kim, Chang-Il;Kim, Kyoung-Tae;Kim, Dong-Pyo;Hwang, Jin-Ho;Lee, Cheol-In
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.186-189
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    • 2002
  • The MFIS capacitors were fabricated using a metalorganic decomposition method. Thin layers of $CeO_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X-ray diffraction was used to determine the phase of the BLT thin films and the quality of the $CeO_2$ layer. The morphology of films and the interface structures of the BLT and the $CeO_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 4.78 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

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Determinants of Operational Self-Sustainability of Microfinance Institutions in Vietnam

  • LE, Thanh Tam;DAO, Lan Phuong;DO, Ngoc Mai;TRUONG, Thi Hoai Linh;NGUYEN, Thi Thuy Duong;TRAN, Chung Thuy
    • The Journal of Asian Finance, Economics and Business
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    • v.7 no.10
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    • pp.183-192
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    • 2020
  • The purpose of this paper is to investigate the determinants of the Operational Self-Sustainability (OSS) of Vietnamese microfinance institutions (MFIs). This research uses both qualitative and quantitative research methods: (i) qualitative research was via in-depth interviews with ten microfinance practitioners, policymakers and researchers; (ii) quantitative research was conducted by using panel data of 34 MFIs in the period 2011-2015 with binary logistics and OLS regressions. Results are as follows: (i) MFIs' OSS in Vietnam are mainly determined by five key factors: portfolio at risk (PAR>30), capital structure, gross loan portfolio, scope of activities and legal form; (ii) OSS are most affected by legal status (social organizations have better OSS than formal MFIs or programs/projects), location (MFIs focus in one province have higher OSS than working nationwide or just in one district), capital structure (MFIs with more equity proportion have higher OSS); (iii) surprisingly, average loan size per borrower and age of MFIs do not have statistically significant correlation with OSS. The key recommendations are: (i) MFIs should focus on its professionality and increase its equity; (ii) related stakeholders such as State Bank of Vietnam should promote the enabling ecosystem for microfinance development to enhance poverty reduction and economic development.

Preparation of ZrO2 and SBT Thin Films for MFIS Structure and Electrical Properties (ZrO2 완충층과 SBT박막을 이용한 MFIS 구조의 제조 및 전기적 특성)

  • Kim, Min-Cheol;Jung, Woo-Suk;Son, Young-Guk
    • Journal of the Korean Ceramic Society
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    • v.39 no.4
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    • pp.377-385
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    • 2002
  • The possibility of $ZrO_2$ thin film as insulator for Metal-Ferroelectric-Insulator-Semiconductor(MFIS) structure was investgated. $SrBi_2Ta_2O_9$ and $SrBi_2Ta_2O_9$(SBT) thin films were deposited on P-type Si(111) wafer by R. F. magnetron sputtering method. The electrical properties of MFIS gate were relatively improved by inserting the $ZrO_2$ buffer layer. The window memory increased from 0.5 to 2.2V in the applied gate voltage range of 3-9V when the thickness of SBT film increased from 160 to 220nm with 20nm thick $ZrO_2$. The maximum value of window memory is 2.2V in Pt/SBT(160nm)/$ZrO_2$(20nm)/Si structure with the optimum thickness of $ZrO_2$. These memory windows are sufficient for practical application of NDRO-FRAM operating at low voltage.

Electric Properties of MFIS Capacitors using Pt/LiNbO3/AlN/Si(100) Structure (Pt/LiNbO3/AlN/Si(100) 구조를 이용한 MFIS 커패시터의 전기적 특성)

  • Jung, Soon-Won;Kim, Kwang-Ho
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.12
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    • pp.1283-1288
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    • 2004
  • Metal-ferroelectric-insulator-semiconductor(WFIS) capacitors using rapid thermal annealed LiNbO$_3$/AlN/Si(100) structure were fabricated and demonstrated nonvolatile memory operations. The capacitors on highly doped Si wafer showed hysteresis behavior like a butterfly shape due to the ferroelectric nature of the LiNbO$_3$ films. The typical dielectric constant value of LiNbO$_3$ film in the MFIS device was about 27, The gate leakage current density of the MFIS capacitor was 10$^{-9}$ A/cm$^2$ order at the electric field of 500 kV/cm. The typical measured remnant polarization(2P$_{r}$) and coercive filed(Ec) values were about 1.2 $\mu$C/cm$^2$ and 120 kV/cm, respectively The ferroelectric capacitors showed no polarization degradation up to 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulses of 1 MHz. The switching charges degraded only by 10 % of their initial values after 4 days at room temperature.e.

Fabrications and properties of MFIS structure using AIN buffer layer (AIN 버퍼층을 사용한 MFIS 구조의 제작 및 특성)

  • 정순원;김용성;이남열;김진규;정상현;김광호;유병곤;이원재;유인규
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.29-32
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    • 2000
  • Meta1-ferroelectric-insulator-semiconductor(MFIS) devices using Pt/LiNbO$_{3}$/AIN/Si structure were successfully fabricated. AIN thin films were made into metal-insulator-semiconductor(MIS) devices by evaporating aluminum in a dot array on the film surface. The dielectric constant of the AIN film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V ) characteristic is 8. The gate leakage current density of MIS devices using a aluminum electrode showed the least value of 1$\times$10$^{-8A}$ $\textrm{cm}^2$ order at the electric field of 500㎸/cm. A typica] value of the dielectric constant of MFIS device was about 23 derived from 1MHz capacitance-voltage (C-V) measurement and the resistivity of the film at the field of 500㎸/cm was about 5.6$\times$ 10$^{13}$ $\Omega$.cmcm

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