• Title/Summary/Keyword: MIPS

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Characterization and functional analysis of a myo-inositol 1-phosphate synthase cDNA in sesame (Sesamum indicum L.) (참깨 myo-inositol 1-phosphate synthase 유전자의 특성과 기능분석에 관한 연구)

  • 진언호;천재안;정정한
    • Journal of Life Science
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    • v.13 no.4
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    • pp.383-389
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    • 2003
  • A cDNA (SeMIPS) encoding myo-inositol 1-phosphate synthase has been isolated from developing sesame (Sesamum indicum L. cv. Dan-Baek) seeds and its structure and function analyzed. The SeMIPS protein was highly homologous with those from plant species (88-94%), while a much lower degree of sequence homology (60%) was found with that of human. The functional domains commonly found in MIPS protein were identified and their amino acid residues were compared with each other. Northern blot indicated that the expression of the SeMIPS gene might be organ-specifically regulated. A complementation assay based on a yeast mutant system confirmed that the SeMIPS gene encodes a myo-inositol 1-phosphate synthase (MIPS) of sesame by showing functional expression of the SeMIPS cDNA in the yeast mutants containing the disrupted INO1 gene.

Automated extraction of MIPS firmware image base using page-granularity (페이지 입상도 기반의 MIPS 펌웨어 베이스 주소 자동추출 기법)

  • Seok-Joo Mun;Daehee Jang
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2023.01a
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    • pp.5-6
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    • 2023
  • 본 논문에서는 MIPS 아키텍쳐 기반 펌웨어에 대한 페이지 단위의 이미지 베이스 주소 탐색 방안을 제안한다. 이 방법은 MIPS 기반 임베디드 기기의 펌웨어를 대상으로, 대상 내의 분석 대상의 이미지 베이스 주소 계산 알고리즘을 효율적으로 개선하여 이미지 베이스 주소탐색 시간을 최소화하는 것을 목표로 한다. 이 방법은 펌웨어 내 문자열의 주소를 기준으로 세그먼트 시작 주소를 유추, 페이지 단위인 4KB 단위로의 이미지 베이스 주소 후보군을 계산하여 이미지 베이스 주소 후보군을 선별하는 것을 그 원리로 한다. 본 논문에 적용된 방법은 기존의 경험적 방법을 통한 펌웨어 베이스 탐색 방안에 비해 정확도면에서 우수함을 보인다.

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Chromatographic Separation of Xanthine Derivatives on Single and Mixed-Template Imprinted Polymers

  • Wang, Dexian;Hong, Seung-Pyo;Row, Kyung-Ho
    • Bulletin of the Korean Chemical Society
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    • v.25 no.3
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    • pp.357-360
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    • 2004
  • We developed in the present study molecular imprinted polymers (MIPs), using single templates (pentoxifylline, caffeine and theophylline) and mixed-templates (pentoxifylline-caffeine, pentoxifylline-theophylline and caffeine-theophylline). The MIPs were prepared with methacrylic acid (MAA) as the monomer, ethylene glycol dimetharylate (EGDMA) as the crosslinker and 2,2'-azobis(isobutyronitrile) (AIBN) as the initiator. The obtained polymer particles (particle size after grinding was about 25-35 ${\mu}$m) were packed into a HPLC column (3.9 mm i.d. ${\times}$ 150 mm). The selectivity and chromatographic characteristics of the MIPs were studied using acetonitrile as the mobile phase at a flow rate of 0.8 mL/min. UV detector wavelength was set at 270 nm. Different single template MIPs showed different molecular recognitions to the templates and the structurally analogues, according to the rigidity and steric hindrance of the compounds. Recognition was improved on the mixed-template MIPs as a result of the cooperation or sum effect of the templates, whereas on the pentoxifylline-theophylline imprinted polymer, the highest selectivity and affinity were obtained. Separations of the test compounds on different polymers were also investigated.

Towards Characterization of Modern FPGAs: A Case Study with Adders and MIPS CPU (가산기와 MIPS CPU 사례를 이용한 현대 FPGA의 특성연구)

  • Lee, Boseon;Suh, Taewon
    • The Journal of Korean Association of Computer Education
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    • v.16 no.3
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    • pp.99-105
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    • 2013
  • The FPGA-based emulation is an essential step in ASIC design for validation. For emulation with maximal frequency, it is crucial to understand the FPGA characteristics. This paper attempts to analyze the performance characteristics of the modern FPGAs from renowned vendors, Xilinx and Altera, with a case study utilizing various adders and MIPS CPU. Unlike the common wisdom, ripple-carry adder (RCA) does not utilize the inherent carry-chain inside FPGAs when structurally designed based on 1-bit adders. Thus, the RCA shows the inferior performance to the other types of adders in FPGAs. Our study also reveals that FPGAs from Xilinx exhibit different characteristics from the ones from Altera. That is, the prefix adder, which is optimized for speed in ASIC design, shows the poor performance on Xilinx devices, whereas it provides a comparable speed to the IP core on Altera devices. It suggests that error-prone manual change of the original design can be avoided on Altera devices if area is permitted. Experiments with MIPS CPU confirm the arguments.

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The Preparation of Chiral Separation Membranes by UV Polymerization and its Properties (UV 중합에 의한 이성질체 분리막 제조와 특성)

  • Chang, Eun-Jeong;Hong, Joo-Hee;Heo, Kwang-Beom;Kim, Min;Kim, Byoung-Sik
    • Applied Chemistry for Engineering
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    • v.19 no.3
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    • pp.287-294
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    • 2008
  • Molecularly imprinted polymer (MIPs) membranes were prepared by UV polymerization to separate racemates with opposite physiological activity, and then its separation selectivity of racemates was carried out. Likewise, their properties were examined. Polycarbonate (PC) membrane was polymerized as small spot form in pore inner wall, but anodisc (AD) membrane was polymerized as film form with thickness 500~700 nm onto the membrane surface. Also the study on the separation selectivity of prepared MIPs membranes was carried out in L-Tryptophane (Trp) racemate solution. The results showed that AD MIPs membrane polymerized as a film form, which was achieved by solution polymerizaion consisting of over 90% cross-linking agent (ethylene glycol dimethacrylate; EGDMA) and under 30% dispersing agent (methanol; MeOH), had predominant 3.5 selectivity.

Real-time Implementation of Variable Transmission Bit Rate Vocoder Improved Speech Quality in SOLA-B Algorithm & G.729A Vocoder Using on the TMS320C5416 (TMS320C5416을 이용한 SOLA-B 알고리즘과 G.729A 보코더의 음질 향상된 가변 전송률 보코더의 실시간 구현)

  • Ham, Myung-Kyu;Bae, Myung-Jin
    • Speech Sciences
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    • v.10 no.3
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    • pp.241-250
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    • 2003
  • In this paper, we implemented the vocoder of variable rate by applying the SOLA-B algorithm to the G.729A to the TMS320C5416 in real-time. This method using the SOLA-B algorithm is that it is reduced the duration of the speech in encoding and is played at the speed of normal by extending the duration of the speech in decoding. But the method applied to the existed G.729A and SOLA-B algorithm is caused the loss of speech quality in G.729A which is not reflected about length variation of speech. Therefore the proposed method is encoded according as it is modified the structure of LSP quantization table about the length of speech is reduced by using the SOLA-B algorithm. The vocoder of variable rate by applying the G.729A and SOLA-B algorithm is represented the maximum complexity of 10.2MIPS about encoder and 2.8MIPS about decoder in 8kbps transmission rate. Also it is evaluated 17.3MIPS about encoder, 9.9MIPS about decoder in 6kbps and 18.5MIPS about encoder, 11.1MIPS about decoder in 4kbps according to the transmission rate. The used memory is about program ROM 9.7kwords, table ROM 4.69kwords, RAM 5.2kwords. The waveform of output is showed by the result of C simulator and Bit Exact. Also, the result of MOS test for evaluation of speech quality of the vocoder of variable rate which is implemented in real-time, it is estimated about 3.68 in 4kbps.

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Real-Time DSP Implementation of Adaptive Multi-Rate with TMS320C542 board (TMS320C542보드를 이용한 Adaptive Multi-Rate 음성부호화기의 실시간 구현)

  • 박세익;전라온;이인성
    • Proceedings of the IEEK Conference
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    • 2000.09a
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    • pp.827-830
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    • 2000
  • 3GPP and ETSI adopted AMR(Adaptive Multi-Rate) as a standard for next generation IMT-2000 service. In this paper, we analyzed algorithm about AMR and optimized ANSI C source on the C complier and assembly language of Texas Instrument . The implemented AMR speech codec requires 28.2MIPS of complexity for encoder and 5.5MIPS for decoder. we performed real-time implementation of AMR speech codec using 82% of TMS320C5402 with 40 MIPS specification. We give proof that the output speech of the implemented speech codec on DSP board is identical with result of C source program simulation. Also the reconstructed speech is verified in the real-time environment consisted of microphone and speaker.

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A firmware base address search technique based on MIPS architecture using $gp register address value and page granularity

  • Seok-Joo, Mun;Young-Ho, Sohn
    • Journal of the Korea Society of Computer and Information
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    • v.28 no.2
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    • pp.1-7
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    • 2023
  • In this paper, we propose a base address candidate selection method using the $gp register and page granularity as a way to build a static analysis environment for firmware based on MIPS architecture. As a way to shorten the base address search time, which is a disadvantage of the base address candidate selection method through inductive reasoning in existing studies, this study proposes a method to perform page-level search based on the $gp register in the existing base address candidate selection method as a reference point for search. Then, based on the proposed method, a base address search tool is implemented and a static analysis environment is constructed to prove the validity of the target tool. The results show that the proposed method is faster than the existing candidate selection method through inductive reasoning.

Material Intensity of Korea's Steel and Iron, Using MIPS Methodology (MIPS를 이용한 국내 철강의 물질집중도(Material Intensity) 연구)

  • Kim, Yu-Jeong;Heo, Eunn-Yeong;Kim, Seong-Yong
    • Economic and Environmental Geology
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    • v.41 no.5
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    • pp.497-507
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    • 2008
  • This study identified and quantified the hidden flows for steel and iron production in Korea using MIPS (Material Input per Service) methodology. In order to estimate the input orientated impact on the environment caused by the manufacture or services of a product, MIPS indicates the quantity of resources used for this product or service. In 2005, 71 million tons of raw materials were used to produce $17.6 million of added value and 4.8 thousand tons of finished steel. The amount of natural resources extracted from natural environments for the purpose of steel production was 245 million tons of TMR(Total Material Requirement), 1524 million tons of water, and 34 million tons of air. The material intensities for steel production by natural inputs (raw materials and energy) was 4.3 ton/ton of TMR, 28 ton/ton of water, and 0.5 ton/ton of air.

Real-time Implementation of Speech and Channel Coder on a DSP Chip for Radio Communication System (무선통신 적용을 위한 단일 DSP칩상의 음성/채널 부호화기 실시간 구현)

  • Kim Jae-Won;Sohn Dong-Chul
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.6
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    • pp.1195-1201
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    • 2005
  • This paper deals with procedures and results for teal time implementation of G.729 speech coder and channel coder including convolution codec, viterbi decoder, and interleaver using a fixed point DSP chip for radio communication systems. We described the method for real-time implementation based on integer simulation results and explained the implemented results by quality performance and required complexity for real-time operation. The required complexity was 24MIPS and 9MIPS in computational load, and 12K words and 4K words in execution code length for speech and channel. The functional evaluation was performed into two steps. The one was bit exact comparison with a fixed point C code, the other was executed by actual speech samples and error test vectors. Unlik other results such as individual implementation, We implemented speech and channel coders on a DSP chip with 160MIPS computation capability and 64 K words memory on chip. This results outweigh the conventional methods in the point of system complexity and implementation cost for radio communication system.