• Title/Summary/Keyword: Micro bump

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A study of fabrication micro bump for TSP testing using maskless lithography system. (Maskless Lithography system을 이용한 TSP 검사 용 micro bump 제작에 관한 연구.)

  • Kim, Ki-Beom;Han, Bong-Seok;Yang, Ji-Kyung;Han, Yu-Jin;Kang, Dong-Seong;Lee, In-Cheol
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.5
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    • pp.674-680
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    • 2017
  • Touch Screen Panel (TSP) is a widely used personal handheld device and as a large display apparatus. This study examines micro bump fabrication technology for TSP test process. In the testing process, as TSP is changed, should make a new micro bump for probing and modify the testing program. In this paper we use a maskless lithography system to confirm the potential to fabricatemicro bump to reducecost and manufacturing time. The requiredmaskless lithography system does not use a mask so it can reduce the cost of fabrication and it flexible to cope with changes of micro bump probing. We conducted electro field simulation by pitches of micro bump and designed the lithography pattern image for the maskless lithography process. Then we conducted Photo Resist (PR) patterning process and electro-plating process that are involved in MEMS technology to fabricate micro bump.

Micro-bump Joining Technology for 3 Dimensional Chip Stacking (반도체 3차원 칩 적층을 위한 미세 범프 조이닝 기술)

  • Ko, Young-Ki;Ko, Yong-Ho;Lee, Chang-Woo
    • Journal of the Korean Society for Precision Engineering
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    • v.31 no.10
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    • pp.865-871
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    • 2014
  • Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

Novel AM-OLED with Light Extraction Enhancement

  • Ibaraki, Nobuki
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1785-1788
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    • 2007
  • We investigated the effect on light extraction in OLED by introducing aluminum micro bump light scattering reflector. By attaching the micro bump reflector to a both side emission OLED, we found that the light extraction was 1.7 times larger than a simple flat reflector. We fabricated a 20.8” inch WXGA full color AM-OLED by integrating the micro bump scattering reflector.

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The Effect of SiC Nanopaticles on Interface of Micro-bump manufactured by electroplating (나노입자가 전해도금으로 형성된 미세범프의 계면에 미치는 영향)

  • Sin, Ui-Seon;Lee, Se-Hyeong;Lee, Chang-U;Jeong, Seung-Bu;Kim, Jeong-Han
    • Proceedings of the KWS Conference
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    • 2007.11a
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    • pp.245-247
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    • 2007
  • Sn-base solder bump is mainly used in micro-joining for flip chip package. The quantity of intermetallic compounds that was formed between Cu pad and solder interface importantly affects reliability. In this research, micro-bump was fabricated by two binary electroplating and the intermetallic compounds(IMCs) was estimated quantitatively. When the micro Sn-Ag solder bump was made by electroplating, SiC powder was added in the plating solution for protecting of intermetallic growth. Then, the intermetallic compounds growth was decrease with increase of amount of SiC power. However, if the mount of SiC particle exceeds 4 g/L, the effect of the growth restraint decrease rapidly.

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Study on Joint of Micro Solder Bump for Application of Flexible Electronics (플렉시블 전자기기 응용을 위한 미세 솔더 범프 접합부에 관한 연구)

  • Ko, Yong-Ho;Kim, Min-Su;Kim, Taek-Soo;Bang, Jung-Hwan;Lee, Chang-Woo
    • Journal of Welding and Joining
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    • v.31 no.3
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    • pp.4-10
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    • 2013
  • In electronic industry, the trend of future electronics will be flexible, bendable, wearable electronics. Until now, there is few study on bonding technology and reliability of bonding joint between chip with micro solder bump and flexible substrate. In this study, we investigated joint properties of Si chip with eutectic Sn-58Bi solder bump on Cu pillar bump bonded on flexible substrate finished with ENIG by flip chip process. After flip chip bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test, thermal shock test, and bending test. After thermal shock test, we observed that crack initiated between $Cu_6Sn_5IMC$ and Sn-Bi solder and then propagated within Sn-Bi solder and/or interface between IMC and solder. On the other hands, We observed that fracture propated at interface between Ni3Sn4 IMC and solder and/or in solder matrix after bending test.

The Chip Bonding Technology on Flexible Substrate by Using Micro Lead-free Solder Bump (플렉서블 기반 미세 무연솔더 범프를 이용한 칩 접합 공정 기술)

  • Kim, Min-Su;Ko, Yong-Ho;Bang, Jung-Hwan;Lee, Chang-Woo
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.3
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    • pp.15-20
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    • 2012
  • In electronics industry, the coming electronic devices will be expected to be high integration and convergence electronics. And also, it will be expected that the coming electronics will be flexible, bendable and wearable electronics. Therefore, the demands and interests of bonding technology between flexible substrate and chip for mobile electronics, e-paper etc. have been increased because of weight and flexibility of flexible substrate. Considering fine pitch for high density and thermal damage of flexible substrate during bonding process, the micro solder bump technology for high density and low temperature bonding process for reducing thermal damage will be required. In this study, we researched on bonding technology of chip and flexible substrate by using 25um Cu pillar bumps and Sn-Bi solder bumps were formed by electroplating. From the our study, we suggest technology on Cu pillar bump formation, Sn-Bi solder bump formation, and bonding process of chip and flexible substrate for the coming electronics.

Recent Advances in Fine Pitch Cu Pillar Bumps for Advanced Semiconductor Packaging (첨단 반도체 패키징을 위한 미세 피치 Cu Pillar Bump 연구 동향)

  • Eun-Chae Noh;Hyo-Won Lee;Jeong-Won Yoon
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.3
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    • pp.1-10
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    • 2023
  • Recently, as the demand for high-performance computers and mobile products increases, semiconductor packages are becoming high-integration and high-density. Therefore, in order to transmit a large amount of data at once, micro bumps such as flip-chip and Cu pillar that can reduce bump size and pitch and increase I/O density are used. However, when the size of the bumps is smaller than 70 ㎛, the brittleness increases and electrical properties decrease due to the rapid increase of the IMC volume fraction in the solder joint, which deteriorates the reliability of the solder joint. Therefore, in order to improve these issues, a layer that serves to prevent diffusion is inserted between the UBM (Under Bump Metallization) or pillar and the solder cap. In this review paper, various studies to improve bonding properties by suppressing excessive IMC growth of micro-bumps through additional layer insertion were compared and analyzed.

Formation of Indium Bumps on Micro-pillar Structures through BCB Planarization (BCB 평탄화를 활용한 마이크로 기둥 구조물 위의 인듐 범프 형성 공정)

  • Park, Min-Su
    • Journal of the Microelectronics and Packaging Society
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    • v.28 no.4
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    • pp.57-61
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    • 2021
  • A formation process of indium bump arrays on micro-pillar structures is proposed. The space to form indium bump on the narrow structures can be secured applying the benzocyclobutene (BCB) planarization and its etch-back process. We exhibit a detailed overview of the process steps involved in the fabrication of 320×256 hybrid camera sensor for short-wavelength infrared (SWIR) detection. The shear strength of the BCB, which has undergone the different processes, is extracted by quartz crystal microbalance measurement. The shear strength of the BCB is three orders of magnitude higher than that of the indium bump itself. The measured dark current distribution of the fabricated SWIR camera sensor indicates the suggested process of indium bumps can be useful for embodying highly sensitive infared camera sensors.

Adhesion and Friction Forces of Micro Surface Bumps (마이크로 표면돌기의 응착력과 마찰력)

  • Cho Sung-San;Lim Je-Sung;Park Seungho;Lee Seungseop
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.28 no.8 s.227
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    • pp.1087-1092
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    • 2004
  • Adhesion and friction forces influence adversely on performance and durability of MEMS. It has been reported that the adhesion and friction forces can be reduced with the introduction of micro surface bumps into the contacting interfaces. In this study experiments were conducted to investigate comparatively the effect of hemispherical and torus micro bumps on the adhesion and friction forces. It is confirmed that micro bumps reduce the adhesion and friction forces, and their effect is more pronounced with the bumps of smaller outer boundary radius. Moreover, the results shows that the torus bumps exhibit more rapid decrease of the adhesion and friction forces with the decrease in the outer boundary radius of bump than the hemispherical bumps. When the magnitude of adhesion force is same, the torus bumps generate smaller friction force than the hemispherical bumps. The usage of hemispherical and torus bumps to reduce the adhesion and friction forces in MEMS is discussed.

Aging Characteristic of Shear Strength in Micro Solder Bump (마이크로 솔더 범프의 전단강도와 시효 특성)

  • 김경섭;유정희;선용빈
    • Journal of Welding and Joining
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    • v.20 no.5
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    • pp.72-77
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    • 2002
  • Flip-chip interconnection that uses solder bump is an essential technology to improve the performance of microelectronics which require higher working speed, higher density, and smaller size. In this paper, the shear strength of Cr/Cr-Cu/Cu UBM structure of the high-melting solder b01p and that of low-melting solder bump after aging is evaluated. Observe intermetallic compound and bump joint condition at the interface between solder and UBM by SEM and TEM. And analyze the shear load concentrated to bump applying finite element analysis. As a result of experiment, the maximum shear strength of Sn-97wt%Pb which was treated 900 hrs aging has been decreased as 25% and Sn-37wt%Pb sample has been decreased as 20%. By the aging process, the growth of $Cu_6Sn_5$ and $Cu_3Sn$ is ascertained. And the tendency of crack path movement that is interior of a solder to intermetallic compound interface is found.