• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.685-688
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• 2008

Mini-LVDS has been widely used for high speed data transmission because it provides low EMI and high bandwidth for display driver. In this paper, a Mini-LVDS output buffer with LTPS TFT process is presented which provides sufficient performance in the presence of large variation in the threshold voltage and mobility and kink effect.

• Information Display
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• v.3 no.3
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• pp.3-12
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• 2002

FPD(Flat Panel Display; 평판 디스플레이) 시스템에서의 고속 인터페이스 기술은 적용 범주에 따라 호스트 모듈과 디스플레이 모듈간의 인터페이스와 타이밍 제어기와 구동 LSI 간의 인터페이스로 구분된다 현재까지 발표된 FPD용 인터페이스 기술에는 호스트 모듈과 디스플레이 모듈간의 인터페이스 기술로서 LVDS와 TMDS가 있으며, 타이밍 제어기와 구동 LSI 간의 인터페이스로서 RSDS, Mini-LVDS, CMADS, Whisper Bus 가 있다. 본 고에서는 이러한 기술들의 특징 및 장단점에 대해 논하고, 고속 인터페이스 기술의 향후 전망 및 과제를 제시한다.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.677-680
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• 2008

AiPi technology incorporates an embedded clock and control scheme with a point-to-point bus topology, achieving the smallest possible number of interface lines between a timing controller and source drivers. A 46" AiPi-based 10-bit FHD prototype requires only 20 interface lines, compared to 38 lines for mini-LVDS. The measured maximum data rate per one data pair is more than 800Mbps.

• Journal of Information Display
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• v.10 no.1
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• pp.37-44
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• 2009

AiPi technology incorporates an embedded clock and control scheme with a point-to-point bus topology, thereby having the smallest possible number of interface lines between a timing controller and column drivers. A point-to-point architecture boosts the data rate and reduces the number of interface lines, because impedance matching can be easily achieved. An embedded clock and control scheme is implemented by means of multi-level signalling, which results in a simple clock/data recovery circuitry. A 46" AiPi-based 10-bit FHD prototype requires only 20 interface lines, compared to 38 lines for mini-LVDS. The measured maximum data rate per data pair is more than 800 Mbps.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.657-658
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• 2005

We designed 10bit source driver LSI, then the high color depth and the low power consumption are realized thru it. It is adopted mini-LVDS receiver with high speed data transmission and good data recovery performance, Hybrid type DAC to reduce decoder size and OP-AMP with low power consumption and high slew rate. In addition we show our results of the 10-bit gray scale TFT-LCD source driver for 42inch diagonal size and WXGA resolution TFT-LCD TV applications.