• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.546-550
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• 2013

We propose a novel negative differential resistance (NDR) device with ultra-high peak-to-valley current ratio (PVCR) by combining pn junction diode with depletion mode nanowire (NW) transistor, which suppress the valley current with transistor off-leakage level. Band-to-band tunneling (BTBT) Esaki diode with degenerately doped pn junction can provide multiple switching behavior having multi-peak and valley currents. These multiple NDR characteristics can be controlled by doping concentration of tunnel diode and threshold voltage of NW transistor. By designing our NDR device, PVCR can be over $10^4$ at low operation voltage of 0.5 V in a single peak and valley current.

• International Journal of Control, Automation, and Systems
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• v.6 no.4
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• pp.613-619
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• 2008

A method to produce a desired current pattern in a multiple-source EIT system using voltage sources is presented. Application of current patterns to a body is known to be superior to the application of voltage patterns in terms of high spatial frequency noise suppression, resulting in high accuracy in conductivity and permittivity images. Since current sources are difficult and expensive to build, the use of voltage sources to apply the current pattern is desirable. An iterative algorithm presented in this paper generates the necessary voltage pattern that will produce the desired current pattern. The convergence of the algorithm is shown under the condition that the estimation error of the linear mapping matrix from voltage to current is small. Simulation results are presented to illustrate the convergence of the output current.

• Journal of Sensor Science and Technology
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• v.21 no.1
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• pp.1-6
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• 2012

Using a current-mode multiple reset, a current-to-voltage(I-V) converter with a wide dynamic range was produced. The converter consists of a trans-impedance amplifier(TIA), an analog-to-digital converter(ADC), and an N-bit counter. The digital output of the I-V converter is composed of higher N bits and lower bits, obtained from the N-bit counter and the ADC, respectively. For an input current that has departed from the linear region of the TIA, the counter increases its digital output, this determines a reset current which is subtracted from the input current of the I-V converter. This current-mode reset is repeated until the input current of the TIA lies in the linear region. This I-V converter is realized using 0.35 ${\mu}m$ LSI technology. It is shown that the proposed I-V converter can increase the maximum input current by a factor of $2^N$ and widen the dynamic range by $6^N$. Additionally, the I-V converter is successfully applied to a photometric sensor.

• Journal of Power Electronics
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• v.11 no.3
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• pp.256-263
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• 2011

This paper utilizes free oscillation and energy injection principles to generate and control the high frequency current in the primary track of a contactless power transfer system. Here the primary power inverter maintains natural resonance while ensuring near constant current magnitude in the primary track as required for multiple independent loads. Such energy injection controllers exhibit low switching frequency and achieve ZCS (Zero Current Switching) by detecting the high frequency current, thus the switching stress, power losses and EMI of the inverter are low. An example full bridge topology is investigated for a contactless power transfer system with multiple pickups. Theoretical analysis, simulation and experimental results show that the proposed system has a fast and smooth start-up transient response. The output track current is fully controllable with a sufficiently good waveform for contactless power transfer applications.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.12
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• pp.685-690
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• 2000

Multiple-lightning impulse currents are a general feature of the lightning ground f=flash. It is therefore necessary for lightning arresters used in power systems to be estimated by applying not only a single-lightning impulse current but also a multiple-lightning impulse currents. This paper presents the effects of multiple-lightning impulse currents on deterioration of ZnO arrester blocks. The multiple-lightning impulse generator which can produce quadruple 8/20$[\mus]$ 5[kA] with separation time of 30~120[ms] is designed and fabricated. The total energy applied to the arrester block at each impulse is about 1,200[J]. In experiment, various parameters such as leakage current component, reference voltage, and temperature are measured with the number of applied impulse current. Also, micro-structure changes of the ZnO blocks after applying the single and the multiple-lightning impulse currents of 200 times are compared. The experimental results indicate that the types of arrester blocks are more vulnerable to deterioration or damage by multiple-lightning impulse currents.

• Journal of the Institute of Convergence Signal Processing
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• v.6 no.3
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• pp.134-142
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• 2005

The implementation of Multiple-Valued Logic(MVL) based on Current-Mode CMOS Logic(CMCL) circuits has recently been achieved. In this paper, four-valued Unary Multiple-Valued logic functions are synthesized using current-mode CMOS logic circuits. We properly make use of the fact that the CMCL addition of logic values represented using discrete current values can be performed at no cost and that negative logic values are readily available via reversing the direction of current flow. A synthesis process for CMCL circuits is based upon a logically complete set of basic elements. Proposed algorithm results in less expensive realization than those achieved using existing techniques in terms of the number of transistors needed. As an alternative to the cost-table techniques Universal Unary Programmable Circuit (UUPC) for a unary function is also proposed.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.275-278
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• 2003

This paper presents a full-adder using current-mode multiple valued logic CMOS circuits. This paper compares propagation delay, power consumption, and PDP(Power Delay Product) compared with conventional circuit. This circuit is designed with a samsung 0.35um n-well 2-poly 3-metal CMOS technology. Designed circuits are simulated and verified by HSPICE. Proposed full-adder has 2.25 ns of propagation delay and 0.21 mW of power consumption.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.155-158
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• 2000

Circuit configurations for realizing of biquadratic current transfer functions using current conveyors (CCIIs) are presented. The circuits are composed of three multiple-output CCIIs and four passive elements (two resistors and two grounded capacitors), and when current controlled conveyors (CCIIs) in place of CCIIs are employed, the circuit can be realized using three multiple-output CCIIs and two grounded capacitors. Use of grounded capacitors is suitable for integrated implementation. The cutoff frequency of a realized filter with current gain K can be tuned independently of Q by the value of K.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.3
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• pp.191-200
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• 2002

In this paper, we present the method transforming the interval functions into the truncated difference functions for multi-variable multi-valued functions and implementing the truncated difference functions to the multiple valued logic circuits with uniform patterns using the current mirror circuits and the inhibit circuits by current-mode CMOS. Also, we apply the presented methods to the implementation of circuits for additive truth table of 2-variable 4-valued MOD(4) and multiplicative truth table of 2-variable 4-valued finite fields GF(4). These circuits are simulated under 2${\mu}{\textrm}{m}$ CMOS standard technology, 15$mutextrm{A}$ unit current, and 3.3V power supply voltage using PSpice. The simulation results have shown the satisfying current characteristics. Both implemented circuits using current-mode CMOS have the uniform Patterns and the regularity of interconnection. Also, it is expansible for the variables of multiple valued logic functions and are suitable for VLSI implementation.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.9
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• pp.1385-1390
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• 2015

This paper is analysis of multiple factor that should be considered in the design of an eddy current brake used as auxiliary brake system. The eddy current brake is a brake that generates a braking torque in a rotational direction opposite to the direction of the rotor by using a time-varying magnetic flux. The eddy current brake has the advantage of being able to take high current densities because this is used for a short period of time. Also, the eddy current brake is influenced by multiple factor such as number of slots, teeth width, coating thickness, air-gap length and so on. Therefore the eddy current brake was designed for use in railway application in consideration of the operation region and critical parameters.