• JSTS:Journal of Semiconductor Technology and Science
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• 제14권4호
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• pp.457-462
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• 2014

This letter proposes a low-jitter DLL-based clock generator with two negative feedback loops. The main negative feedback loops suppress the jitter of DLL. The additional negative feedback loops suppress the delay-time variance of each delay stages. Both two negative feedback loops in a DLL results in suppressing the jitter of clock signal further. Measurement results of the DLL-based clock generator with two negative feedback loops fabricated in a one-poly six-metal $0.18{\mu}m$ CMOS process show 5.127-ps rms jitter and 47.6-ps peak-to-peak jitter at 1 GHz.

• 한국정보전자통신기술학회논문지
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• 제16권4호
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• pp.167-172
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• 2023

본 논문에서는 3개의 부궤환 루프를 가진 저잡음 위상고정루프를 제안하였다. 기존 구조의 위상고정루프는 하나의 부궤환 루프로 구성되어 있어 잡음 특성 개선이 쉽지 않다. 추가된 부궤환 루프는 지터 특성을 결정하는 전압제어발진기의 입력 전압 크기를 줄여주는 역할을 하여 기존 구조로 쉽지 않은 잡음 특성 개선을 가능하게 해준다. 시뮬레이션 결과는 부궤환 루프가 추가될 때마다 지터 특성이 개선되는 것을 보여주고 있다. 전력의 경우 10% 정도 약간 상승하게 되지만, 지터 특성은 2배 정도 개선된다. 제안된 위상고정루프는 1.8V 180nm CMOS 공정을 이용하여 Hspice로 시뮬레이션 하였다.

• 한국시스템다이내믹스연구
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• 제10권4호
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• pp.39-51
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• 2009

In this paper, we constructed a cognitive map of President Lee of Korea on the policy vision of green growth. This cognitive map is characterized by a scarcity of feedback loops and a strong emphasis on the positive loops. These characteristics can be understood by the fact that the green growth policy is to overcome the limits to growth coming from negative feedback loops. As a conclusion, we proposed a negative feedback loop approach to the green growth policy vision, which might minimize the side effects of positive loops.

• 한국정보시스템학회:학술대회논문집
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• 한국정보시스템학회 2004년도 춘계학술대회
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• pp.316-335
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• 2004

This paper builds a system dynamics model analyzing first mover effect and growth strategy of online retailer, a major segment of B2C e-commerce. The dynamic model in this paper is calibrated to the online book market and Yes24.com as major test cases. The model consists of eight key value chain sectors. Five of these(Users, Site Operations, Human Resources, Financial Accounting, and Fundraising) are internal to the company, and three others(Market, Financial Market, and Relative Performance) are external to the company. With the model, this paper suggests research propositions representing positive feedback loops and negative feedback loops that lead to corporate growth and limits to growth according to dynamic causal relationships among eight key value chain sectors, and simulate these propositions.

• 한국정보통신학회논문지
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• 제20권4호
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• pp.811-818
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• 2016

추가적인 부궤환 루프를 가지는 연속 미세 조절 위상 고정루프를 소개하였다. 위상고정루프가 위상이 고정되지 않았을 때 위상고정루프는 연속적인 밴드 선택 루프를 통하여 빠르게 위상을 고정시키는 특성을 가지고 있다. 위상고정루프가 고정 상태에 다다랐을 때 밴드 폭은 미세한 루프를 통해서 좁아진다. 추가적인 부궤환 루프는 안정성과 위상여유 성능을 향상시킨다. 0.18um CMOS 공정으로 제작한 위상고정루프의 결과 측정은 위상 잡음이 742.8MHz 캐리어 주파수로부터 2MHz 오프셋 주파수에서 -109.6dBc/Hz을 보여준다.

• 한국시스템다이내믹스연구
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• 제10권1호
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• pp.97-107
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• 2009

In this paper, a structural similarity between traditional oriental philosophy and systems thinking is discussed. The polarity of causal relationship and feedback loops can be interpreted in terms of yin and yang of oriental philosophy. A positive feedback loop which is linked to the yang is a force or mechanism that accelerates changes in systems. A negative feedback loop which is linked to the yin can be interpreted as a force oppressing any changes. In this sense, systems thinking can be related to the oriental philosophy. With this linking pin between them, systems thinking can be introduced and educated more friendly in oriental society. Furthermore, systems thinking can get a set of rich insights from the oriental philosophy. This paper suggests a linking leverage between systems thinking and oriental philosophy.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 추계학술대회 논문집 학회본부
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• pp.141-143
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• 1994

The pulse width modulated class D power amplifier has the highest efficiency among various class amplifiers but the performances, such as bandwidth, distortion and stability are inferior to the conventional ones. In this paper, a new class D amplifier design is Presented employing dual feedback loops namely current and voltage feedback. The new design provides wide full-power bandwidth and stability at any load with high efficiency.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1233-1236
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• 2003

This paper proposes a phase-locked loop (PLL) that achieves one-cycle lock acquisition by employing the lock-acquisition circuit (LAC). The LAC produces the initial analog voltage ( v$_{c}$ ) that corresponds to the input frequency. When the transfer curve of the LAC matches that of the voltage-controlled oscillator (VCO), one-cycle locking can be possible. By HSPICE simulations, the proposed LAC is proved to be applicable to any kinds of PLL [1][2][3].].

• 한국정보전자통신기술학회논문지
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• 제12권1호
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• pp.1-6
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• 2019

본 논문에서는 복수개의 부궤환 루프를 도입하여 칩 크기를 획기적으로 줄이면서 잡음 특성을 유지할 수 있는 위상고정루프를 제안하였다. 칩 면적을 최소화하는 것이 주목표이므로 하나의 작은 크기의 커패시터로 구성된 1차 루프필터와 복수개의 FVC를 사용하여 위상고정루프를 설계하였다. 전압제어 발진기에 연결된 복수개의 주파수-전압 변환 회로(frequency voltage converter : FVC)는 위상고정루프 내부에 복수개의 부궤환 루프를 만든다. 제안된 위상고정루프에서는 복수개의 부궤환 루프가 크기가 아주 작은 하나의 커패시터로만 구성된 루프필터를 가진 위상고정루프를 안정하게 동작하도록 해준다. 제안된 위상고정루프는 1.8V $0.18{\mu}m$ CMOS 공정을 이용하여 설계되었다. 시뮬레이션 결과는 1.6ps 지터와 $10{\mu}s$ 위상고장시간을 보여주었다.

• 제어로봇시스템학회논문지
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• 제10권12호
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• pp.1155-1163
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• 2004

Extracellular signal-regulated kinase (ERK) signaling pathway is one of the mitogen-activated protein kinase (MAPK) signal transduction pathways. This pathway is known as pivotal in many signaling networks that govern proliferation, differentiation and cell survival. The ERK signaling pathway comprises positive and negative feedback loops, depending on whether the terminal kinase stimulates or inhibits the activation of the initial level. In this paper, we attempt to model the ERK pathway by considering both of the positive and negative feedback mechanisms based on Michaelis-Menten kinetics. In addition, we propose a fraction ratio model based on the mass action law. We first develop a mathematical model of the ERK pathway with fraction ratios. Secondly, we analyze the dynamical properties of the fraction ratio model based on simulation studies. Furthermore, we propose a concept of an inhibitor, catalyst, and substrate (ICS) controller which regulates the inhibitor, catalyst, and substrate concentrations of the ERK signal transduction pathway. The ICS controller can be designed through dynamical analysis of the ERK signaling transduction pathway within limited concentration ranges.