• Title/Summary/Keyword: Neuron Circuit

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Neuron Circuit Using a Thyristor and Inter-neuron Connection with Synaptic Devices

  • Ranjan, Rajeev;Kwon, Min-Woo;Park, Jungjin;Kim, Hyungjin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.3
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    • pp.365-373
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    • 2015
  • We propose a simple and compact thyristor-based neuron circuit. The thyristor exhibits bi-stable characteristics that can mimic the action potential of the biological neuron, when it is switched between its OFF-state and ON-state with the help of assist circuit. In addition, a method of inter-neuron connection with synaptic devices is proposed, using double current mirror circuit. The circuit utilizes both short-term and long-term plasticity of the synaptic devices by flowing current through them and transferring it to the post-synaptic neuron. The double current mirror circuit is capable of shielding the pre-synaptic neuron from the post synaptic-neuron while transferring the signal through it, maintaining the synaptic conductance unaffected by the change in the input voltage of the post-synaptic neuron.

Integrate-and-Fire Neuron Circuit and Synaptic Device using Floating Body MOSFET with Spike Timing-Dependent Plasticity

  • Kwon, Min-Woo;Kim, Hyungjin;Park, Jungjin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.6
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    • pp.658-663
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    • 2015
  • In the previous work, we have proposed an integrate-and-fire neuron circuit and synaptic device based on the floating body MOSFET [1-3]. Integrate-and-Fire(I&F) neuron circuit emulates the biological neuron characteristics such as integration, threshold triggering, output generation, refractory period using floating body MOSFET. The synaptic device has short-term and long-term memory in a single silicon device. In this paper, we connect the neuron circuit and the synaptic device using current mirror circuit for summation of post synaptic pulses. We emulate spike-timing-dependent-plasticity (STDP) characteristics of the synapse using feedback voltage without controller or clock. Using memory device in the logic circuit, we can emulate biological synapse and neuron with a small number of devices.

Integrate-and-Fire Neuron Circuit and Synaptic Device with Floating Body MOSFETs

  • Kwon, Min-Woo;Kim, Hyungjin;Park, Jungjin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.6
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    • pp.755-759
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    • 2014
  • We propose an integrate-and-fire neuron circuit and synaptic devices with the floating body MOSFETs. The synaptic devices consist of a floating body MOSFET to imitate biological synaptic characteristics. The synaptic learning is performed by hole accumulation. The synaptic device has short-term and long-term memory in a single silicon device. I&F neuron circuit emulate the biological neuron characteristics such as integration, threshold triggering, output generation, and refractory period, using floating body MOSFET. The neuron circuit sends feedback signal to the synaptic transistor for long-term memory.

CMOS Analog Integrate-and-fire Neuron Circuit for Driving Memristor based on RRAM

  • Kwon, Min-Woo;Baek, Myung-Hyun;Park, Jungjin;Kim, Hyungjin;Hwang, Sungmin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.2
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    • pp.174-179
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    • 2017
  • We designed the CMOS analog integrate and fire (I&F) neuron circuit for driving memristor based on resistive-switching random access memory (RRAM). And we fabricated the RRAM device that have $HfO_2$ switching layer using atomic layer deposition (ALD). The RRAM device has gradual set and reset characteristics. By spice modeling of the synaptic device, we performed circuit simulation of synaptic device and CMOS neuron circuit. The neuron circuit consists of a current mirror for spatial integration, a capacitor for temporal integration, two inverters for pulse generation, a refractory part, and finally a feedback part for learning of the RRAM. We emulated the spike-timing-dependent-plasticity (STDP) characteristic that is performed automatically by pre-synaptic pulse and feedback signal of the neuron circuit. By STDP characteristics, the synaptic weight, conductance of the RRAM, is changed without additional control circuit.

Hardware implementation of a pulse-type neuron chain with a synapse function for hodgkin-huxley model (호지킨-헉슬리 모델을 위한 시냅스 기능을 지닌 신경세포 체인의 하드웨어 구현)

  • Jung, Jin-Woo;Kwon, Bo-Min;Park, Ju-Hong;Kim, Jin-Su;Lee, Je-Won;Park, Yong-Su;Song, Han-Jung
    • Journal of Sensor Science and Technology
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    • v.18 no.2
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    • pp.128-134
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    • 2009
  • Integrated circuit of a new neuron chain with a synapse function for Hodgkin-Huxley model which is a good electrical model about a real biological neuron is implemented in a $0.5{\mu}m$ 1 poly 2 metal CMOS technology. Pulse type neuron chain consist of series connected current controlled single neurons through synapses. For the realization of the single neuron, a pair of voltage mode oscillators using operational transconductance amplifiers and capacitors is used. The synapse block which is a connection element between neurons consist of a voltage-current conversion circuit using current mirror. SPICE simulation results of the proposed circuit show 160 mV amplitude pulse output and propagation of the signal through synapses. Measurements of the fabricated pulse type neuron chip in condition of ${\pm}2.5\;V$ power supply are shown and compared with the simulated results.

Implementation of Excitatory CMOS Neuron Oscillator for Robot Motion Control Unit

  • Lu, Jing;Yang, Jing;Kim, Yong-Bin;Ayers, Joseph;Kim, Kyung Ki
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.383-390
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    • 2014
  • This paper presents an excitatory CMOS neuron oscillator circuit design, which can synchronize two neuron-bursting patterns. The excitatory CMOS neuron oscillator is composed of CMOS neurons and CMOS excitatory synapses. And the neurons and synapses are connected into a close loop. The CMOS neuron is based on the Hindmarsh-Rose (HR) neuron model and excitatory synapse is based on the chemical synapse model. In order to fabricate using a 0.18 um CMOS standard process technology with 1.8V compatible transistors, both time and amplitude scaling of HR neuron model is adopted. This full-chip integration minimizes the power consumption and circuit size, which is ideal for motion control unit of the proposed bio-mimetic micro-robot. The experimental results demonstrate that the proposed excitatory CMOS neuron oscillator performs the expected waveforms with scaled time and amplitude. The active silicon area of the fabricated chip is $1.1mm^2$ including I/O pads.

Study on Oscillation Circuit Using CUJT and PUT Device for Application of MFSFET′s Neural Network (MFSFET의 신경회로망 응용을 위한 CUJT와 PUT 소자를 이용한 발진 회로에 관한 연구)

  • 강이구;장원준;장석민;성만영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.06a
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    • pp.55-58
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    • 1998
  • Recently, neural networks with self-adaptability like human brain have attracted much attention. It is desirable for the neuron-function to be implemented by exclusive hardware system on account of huge quantity in calculation. We have proposed a novel neuro-device composed of a MFSFET(ferroelectric gate FET) and oscillation circuit with CUJT(complimentary unijuction transistor) and PUT(programmable unijuction transistor). However, it is difficult to preserve ferroelectricity on Si due to existence of interfacial traps and/or interdiffusion of the constitutent elements, although there are a few reports on good MFS devices. In this paper, we have simulated CUJT and PUT devices instead of fabricating them and composed oscillation circuit. Finally, we have resented, as an approach to the MFSFET neuron circuit, adaptive learning function and characterized the elementary operation properties of the pulse oscillation circuit.

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A Study on Implementation and Interconnection of Chaotic Neuron Circuit (카오스 뉴론회의 구현 및 상호연결에 관한 연구)

  • 이익수;여진경;이경훈;여지환;정호선
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.2
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    • pp.131-139
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    • 1996
  • This paper describes the chaotic neuron model to represent the complicated states of brain and analyzes the dynamical responses of chaotic neuron such as periodic, bifurcation, and chaotic phenomena which are simulated iwth numerical analysis. Next, the chaotic neuron circuit is implemented w ith the analog electronic devices. The transfer function of chaotic neuron is given by summed the linear and nonlinear property. The output function of chaojtic neuron is designed iwth the two cMOS inverters and a feedback resistor. By adjusting the external voltage, the various dynamical properties are demonstrated. In addition, we construt the chaotic neural networks which are composed of the interconnection of chaotic neuroncircuit such as serial, paralle, and layer connection. On the board experiment, we proved the dynamci and chaotic responses which exist in the human brain.

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Design of a Silicon Neuron Circuit using a 0.18 ㎛ CMOS Process (0.18 ㎛ CMOS 공정을 이용한 실리콘 뉴런 회로 설계)

  • Han, Ye-Ji;Ji, Sung-Hyun;Yang, Hee-Sung;Lee, Soo-Hyun;Song, Han-Jung
    • Journal of the Korean Institute of Intelligent Systems
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    • v.24 no.5
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    • pp.457-461
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    • 2014
  • Using $0.18{\mu}m$ CMOS process silicon neuron circuit of the pulse type for modeling biological neurons, were designed in the semiconductor integrated circuit. Neuron circuiSt providing is formed by MOS switch for initializing the input terminal of the capacitor to the input current signal, a pulse signal and an amplifier stage for generating an output voltage signal. Synapse circuit that can convert the current signal output of the input voltage signal, using a bump circuit consisting of NMOS transistors and PMOS few. Configure a chain of neurons for verification of the neuron model that provides synaptic neurons and two are connected in series, were performed SPICE simulation. Result of simulation, it was confirmed the normal operation of the synaptic transmission characteristics of the signal generation of nerve cells.

CMOS Chaotic Neuron for Chaotic Neural Networks (카오스 신경망을 위한 CMOS 혼돈 뉴런)

  • 송한정;곽계달
    • Proceedings of the IEEK Conference
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    • 2000.11c
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    • pp.5-8
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    • 2000
  • Voltage mode chaotic neuron has been designed in integrated circuit and fabricated by using 0.8$\mu\textrm{m}$ single poly CMOS technology. The fabricated CMOS chaotic neuron consist of chaotic signal generator and sigmoid output function. This paper presents an analysis of the chaotic behavior in the voltage mode CMOS chaotic neuron. From empirical equations of the chaotic neuron, the dynamical responses such as time series, bifurcation, and average firing rate are calculated. And, results of experiments in the single chaotic neuron and chaotic neural networks by two neurons are shown and compared with the simulated results.

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