• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.629-632
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• 1998

This paper presents a new and simple technique to realize high Q inductor on low resistivity silicon wafer with 6 $\Omega$.cm. This technique is very compatible with bipolar and CMOS standard silicon process. By forming the deep and narrow trenches on the low resistivity wafer substrate under inductor pattern, oxidizing and filling with undoped polysilicon, the low resistivity silicon wafer acts as high resistivity wafer being suitable for the fabrication of high Q inductor. By using this technique the quality factor (Q) for 8-turn spiral inductor was improved up to max. 10.3 at 2 ㎓ with 3.0 $\mu\textrm{m}$ of metal thickness. The experiment results show that Q on low resistivity silicon wafer with the trench technique have been improved more than 2 times compared to the conventional low resistivity silicon wafer without trenches.

• 마이크로전자및패키징학회지
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• 제16권4호
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• pp.5-8
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• 2009

In this paper, a high-quality low-temperature co-fired ceramic (LTCC) solenoid inductor using a solder ball and an air cavity on a silicon wafer for three-dimensional (3-D) system-in-package (SiP) is proposed. The LTCC multi-layer solenoid inductor is attached using Ag paste and solder ball on a silicon wafer with the air cavity structure. The air cavity is formed on a silicon wafer through an anisotropic wet-etching technology and is able to isolate the LTCC dielectric loss which is equivalent to a low k material effect. The electrical coupling between the metal layer and the LTCC dielectric layer is decreased by adopting the air cavity. The LTCC solenoid inductor using the solder ball and the air cavity on silicon wafer has an improved Q factor and self-resonant frequency (SRF) by reducing the LTCC dielectric resistance and parasitic capacitance. Also, 3-D device stacking technologies provide an effective path to the miniaturization of electronic systems.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.3-6
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• 2002

In this paper, Thin film bulk acoustic resonate.(TFBAR) fillers tuned by gold plated on-wafer inductors are presented. The air-gap type TEBAR is used with aluminum nitride(AIN) as piezoelectric material and platinum as top and bottom electrodes. Inductor equivalent model and modified Butterworth-Van Dyke(MBVD) model are employed for the frequency tuning of fabricated TFBAR bandpass filters. Fabricated inductor has inductance of 3 nH and Q factor of about 8 at 2 ㎓. It is clearly revealed that inductor tuning can enhance the bandwidth of ladder filters and improve out-of-band rejection characteristic around 10㏈.

• 대한전자공학회논문지SD
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• 제45권5호
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• pp.58-64
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• 2008

CMOS $0.18{\mu}m$ 공정을 이용하여 1.8V supply voltage에서 6Gbps 이상의 처리속도를 가지는 1:2 demultiplexer(DEMUX)를 구현하였다. 높은 동작속도를 위하여 Current mode logic(CML)의 Flipflop을 사용하였으며 추가적인 동작속도 향상을 위하여 On-chip micro stacked spiral inductor($10{\times}10{\mu}m^2$)를 사용하였다. 총 12개의 인덕터를 사용하여 $1200{\mu}m^2$의 면적증가만으로 Inductive peaking의 효과를 나타낼 수 있었다. Chip의 측정은 wafer상태로 진행하였고 Micro stacked spiral inductor가 있는 1:2 demultiplexer와 그것이 없는 1:2 demultiplexer를 비교하여 측정하였다. 6Gbps에서 측정결과 Micro stacked spiral inductor를 1:2 demultiplexer가 inductor를 사용하지 않은 구조보다 Eye width가 약3%정도 증가하였고 또한 Jitter가 43%정도 감소하여 개선효과가 있음을 확인하였다. 소비전력은 76.8mW, 6Gbps에서의 Eye height는 180mV로 측정되었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.89-93
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• 2002

In the present paper we suggested a parallel-branch structure of aluminum spiral inductor for the use of RF integrated circuit at 1∼3 GHz. The inductor was implemented on P-type silicon wafer (5∼15 Ω-cm) under the standard CMOS process and it showed a improved quality(Q) factor by more than 10% with no degradation of inductance. The effect of the structure modification on the Q factor and the inductance was scrutinized comparing with those of the conventional spiral inductors.

• 한국전자파학회논문지
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• 제15권3호
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• pp.284-290
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• 2004

본 논문에서는 기판상의 인덕터가 박막공진 여파기의 성능에 미치는 영향을 고찰하기 위하여 두 종류의 사다리형 박막공진 여파기를 설계 및 제작하였다. 여파기를 이루고 있는 박막공진기들의 압전물질은 AIN이고, 전극은 백금(Pt)으로 이루어졌으며 기판에 의한 오버모드(overmode) 현상을 제거하기 위하여 air-gap 형태로 제작되었다. 듀플렉서를 이루고 있는 송신용 여파기의 특성을 보이기 위해 4개의 직렬 공진기와 2개의 병렬 공진기로 이루어진 사다리형 4/2단 여파기가 제작되었으며, 수신용 여파기의 성능을 보이기 위해서는 3/4단으로 제작되었다. 여파기의 성능을 개선하기 위해 사용된 기판상의 인덕터들은 2 ㎓ 대역에서 약 5∼9 정도의 Q값 특성을 보였으며, 인덕터가 연결된 여파기는 연결되지 않은 경우에 비해 약 10∼12 ㏈ 정도의 개선된 대역외 저지특성을 보였다.

• Journal of information and communication convergence engineering
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• 제4권2호
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• pp.88-91
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• 2006

In this paper, a novel physical structure for planar spiral inductors is proposed. The spiral inductors were designed and fabricated on multi-layered substrate Bragg-reflector/silicon (BR/Si) wafer. The impacts of multi-layered structure substrate and pattern on characteristics of inductor were studied. Experimental results show that the inductor embedded on Bragg reflector/silicon substrate can achieve the best improvement. At 0.4-1.6 GHz, the Bragg reflector seems to significantly increase the S11-parameter of the inductor.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2006년도 춘계종합학술대회
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• pp.255-258
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• 2006

In this paper, a novel physical structure for planar spiral inductors is proposed. The spiral inductors were designed and fabricated on multi-layered substrate Bragg-reflector/silicon (BR/Si) wafer. The impacts of multi-layered structure substrate and pattern on characteristics of inductor were studied. Experimental results show that the inductor embedded on Bragg reflector/silicon substrate can achieve the best improvement. At 0.4-1.6 GHz, the Bragg reflector seems to significantly increase the $S_{11}-parameter$ of the inductor.

• 한국전기전자재료학회논문지
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• 제19권8호
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• pp.780-784
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• 2006

We present high aspect ratio air-core solenoid inductors with $100{\mu}m\;and\;200{\mu}m$ tall via structures on Pyrex wafer. The effect of various parameters such as different number of turns, via heights, pitch distance between turns on inductor's radio frequency (RF) characteristics have been studied. The highest Q factor we obtained from various solenoid inductors is 72.8 at 9.7 GHz, which was produced by a 3-turn inductor.

• 한국전기전자재료학회논문지
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• 제16권1호
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• pp.83-87
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• 2003

In the present paper we suggested a parallel branch structure of aluminum spiral inductor for the use of RF integrated circuit at 1∼3 GHz. The inductor was implemented on p-type silicon wafer (5∼15Ω-cm) under the standard CMOS process and it showed a enhanced qualify(Q) factor by more than 10 % with no degradation of inductance. The effect of the structure modification on the Q factor and the inductance was scrutinized comparing with conventional spital inductors