• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.1
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• pp.1-5
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• 2001

STI(shallow trench isolation)-CMP(chemical mechanical polishing) process have been substituted for LOCOS(local oxidation of silicon) process to obtain global planarization in the below sub-0.5㎛ technology. However TI-CMP process, especially TI-CMP with RIE(reactive ion etching) etch back process, has some kinds of defect like nitride residue, torn oxide defect, etc. In this paper, we studied how to reduced torn oxide defects after STI-CMP with RIE etch back processed. Although torn oxide defects which can occur on trench area is not deep and not severe, torn oxide defects on moat area is not deep and not severe, torn oxide defects on moat area is sometimes very deep and makes the yield loss. Thus, we did test on pattern wafers which go through trench process, APECVD process, and RIE etch back process by using an IPEC 472 polisher, IC1000/SUVA4 PAD and KOH base slurry to reduce the number of torn defects and to study what is the origin of torn oxide defects.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.4
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• pp.297-302
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• 2005

Chemical mechanical polishing(CMP) performances can be optimized by several process parameters such as equipment and consumables (pad, backing film and slurry). Pad properties are important in determining removal rate and planarization ability of a CMP process. It is investigated the performance of oxide CMP process using commercial silica slurry after the pad conditioning temperature was varied. Conditioning process with the high temperature made the slurry be unrestricted to flow and be hold, which made the removal rate of oxide film increase. The pad became softer and flexible as the conditioning temperature increases. Then the softer pad provided the better surface planarity of oxide film without defect.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.9
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• pp.438-443
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• 2001

In the shallow trench isolation(STI)-chemical mechanical polishing(CMP) process, the key issues are the optimized thickness control, within-wafer-non-uniformity, and the possible defects such as pad oxide damage and nitride residue. The defect like nitride residue and silicon (or pad oxide) damage after STI-CMP process were discussed to accomplish its optimum process condition. To understand its optimum process condition, overall STI related processes including reverse moat etch, trench etch, STI fill and STI-CMP were discussed. Consequently, we could conclude that law trench depth and high CMP thickness can cause nitride residue, and high trench depth and over-polishing can cause silicon damage.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.17-23
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• 2002

The more productive and stable fabrication can be obtained by applying chemical mechanical polishing (CMP) process to shallow trench isolation (STI) structure in 0.18 $\mu\textrm{m}$ semiconductor device. However, STI-CMP process became more complex, and some kinds of defect such as nitride residue, tern oxide defect were seriously increased. Defects like nitride residue and silicon damage after STI-CMP process were discussed to accomplish its optimum process condition. In this paper, we studied how to reduce torn oxide defects and nitride residue after STI-CMP process. To understand its optimum process condition, We studied overall STI-related processes including trench depth, STI-fill thickness and post-CMP thickness. As an experimental result showed that as the STI-fill thickness becomes thinner, and trench depth gets deeper, more tern oxide were found in the CMP process. Also, we could conclude that low trench depth whereas high CMP thickness can cause nitride residue, and high trench depth and over-polishing can cause silicon damage.

• Journal of the Korean Chemical Society
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• v.47 no.6
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• pp.608-613
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• 2003

In order to remove particles on surface of post-oxide CMP wafer, new cleaning solution was prepared by mixing with DHF (Diluted HF), nonionic surfactant PAAE (Polyoxyethylene Alkyl Aryl Ether), DMSO (Dimethylsulfoxide) and D.I.W.. Silicone wafers were intentionally contaminated by silica, alumina and PSL (polystylene latex) which had different zeta potentials in cleaning solution. This cleaning solution under megasonic irradiation could remove particles and metals simultaneously at room temperature in contrast to traditional AMP (mixture of $NH_4OH,\;H_2O_2$ and D.I.W) without any side effects such as increasing of microroughness, metal line corrosion and deposition of organic contaminants. This suggests that this cleaning solution would be useful future application with copper CMP in brush cleaning process as well as traditional post CMP cleaning process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.189-192
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• 2001

Recently, STI process is getting attention as a necessary technology for making high density of semiconductor by devices isolation method. However, it does have various problems caused by CMP nprocess, such as torn oxide defects, nitride residues on oxide, damages of si active region, contaminations due to post-CMP cleaning, difficulty of accurate end point detection in CMP process, etc. In this work, the various defects induced by CMP process was introduced and the above mentioned problems of CMP process was examined in detail. Finally, the guideline of future CMP process was presented to reduce the effects of these defects.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.189-192
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• 2001

Recently, STI process is getting attention as a necessary technology for making high density of semiconductor by devices isolation method. However, it does have various problems caused by CMP process, such as torn oxide defects, nitride residues on oxide, damages of si active region, contaminations due to post-CMP cleaning, difficulty of accurate end point detection in CMP process, etc. In this work, the various defects induced by CMP process was introduced and the above mentioned Problems of CMP process was examined in detail. Finally, the guideline of future CMP process was presented to reduce the effects of these defects.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.501-504
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• 1999

In the shallow trench isolation(STI) chemical mechanical polishing(CMP) process, the key issues are the optimized thickness control within- wafer-non-uniformity, and the possible defects such as nitride residue and pad oxide damage. These defects after STI CMP process were discussed to accomplish its optimum process condition. To understand its optimum process condition, overall STI related processes including reverse moat etch, trench etch, STI filling and STI CMP were discussed. It is represented that the nitride residue can be occurred in the condition of high post CMP thickness and low trench depth. In addition there are remaining oxide on the moat surface after reverse moat etch. It means that reverse moat etching process can be the main source of nitride residue. Pad oxide damage can be caused by over-polishing and high trench depth.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.2
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• pp.138-143
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• 2004

CMP (Chemical Mechanical Polishing) technology for global planarization of multilevel interconnection structure has been widely studied for the next generation devices. Among the consumables for CMP process, especially, slurry and their chemical compositions play a very important role in the removal rates and within-wafer non-uniformity (WIWNU) for global planarization ability of CMP process. However, CMP slurries contain abrasive particles exceeding 1 ${\mu}{\textrm}{m}$ size, which can cause micro-scratch on the wafer surface after CMP process. Such a large size particle in these slurries may be caused by particle agglomeration in slurry supply-line. In this work, to investigate the effects of agglomeration on the performance of oxide CMP slurry, we have studied an aging effect of silica slurry as a function of particle size distribution and aging time during one month. We Prepared and compared the self-developed silica slurry by adding of alumina powders. Also, we have investigated the oxide CMP characteristics. As an experimental result, we could be obtained the relatively stable slurry characteristics comparable to aging effect of original silica slurry. Consequently, we can expect the saving of high-cost slurry.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.3
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• pp.219-225
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• 2005

To investigate the effects of slurry temperature on the chemical mechanical polishing(CMP) performance of oxide film with silica and ceria slurries, we have studied slurry properties as a function of different slurry temperature. Also, the effects of each input parameter of slurry on the oxide CMP characteristics were investigated. The pH showed a slight tendency of decrease, the conductivity in slurries showed an increased tendency, the mean particle size in slurry decreased, and the zeta potential of slurry decreased with temperature. The removal rates significantly increased and maintained at the specific levels over 4$0^{\circ}C$. The better surface morphology of oxide films could be obtained at 40 $^{\circ}C$ of silica slurry and at 90 $^{\circ}C$ of ceria slurry. It is found that the CMP performance of oxide film could be significantly improved or controlled by change of slurry temperature.