• Title/Summary/Keyword: PCB level EMC

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Correlated Effects of Decoupling Capacitors and Vias Loaded in the PCB Power-Bus (PCB Power-Bus에 장하된, 결합제거 커패시터와 금속선의 상관관계적 영향 연구)

  • Kahng, Sung-Tek
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.2 s.105
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    • pp.213-220
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    • 2006
  • This paper investigates how the PCB power-bus sturcture's characteristics are influenced by the loading of decoupling capacitors in conjunction to other lumped elements including vias. The fields and impedance profiles are rigously evaluated and analyzed on various cases loaded with the above components and their effects will be given to bring better PCB EMC countermeasurs.

Correlated effects of decoupling capacitors and vias loaded in the PCB power-bus (PCB power-bus에 장하된, 결합제거 커패시터와 금속선의 상관관계적 영향 연구)

  • Kahng, Sung-Tek
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2005.11a
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    • pp.429-432
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    • 2005
  • This paper investigates how the PCB power-bus structure's characteristics are influenced by the loading of decoupling capacitors that are placed close to vias, on purpose or not. It is worthwhile to see the correlated effects of the aforementioned lumped elements in that when they inevitably share one DC power-bus they will result in positive or negative changes in the PCB EMC design. The EM fields and impedance profiles are rigously calculated on the PCB power-bus cases loaded with the above components and their effects will be given to bring better PCB EMC countermeasures.

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Study of EMC Optimization of Automotive Electronic Components using ECAE

  • Kim, Tae-Ho;Kim, Mi-Ro;Jung, Sang-Yong
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.3
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    • pp.248-251
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    • 2014
  • As more vehicles become equipped with advanced electronic control systems, more consideration is needed with regards to automotive safety issues related to the effects of electromagnetic waves. Unwanted electromagnetic waves from the antenna, electricity and other electronic devices cause the performance and safety problem of automotive components. In general, Power Integrity and Signal Integrity analysis have been widely used, but these analyses have stayed PCB level. PCB base analysis is different from radiated emission TEST condition so its results are used just for reference. This paper proposes EMC optimization technology using module level 3-dimensional radiation simulation process closed to fundamental test conditions. If module level EMC analysis, which is proposed in this study, is applied to all automotive electronics systems, unexpected EMC noise will be prevented.

PCB Level EMC Expert System의 소개와 연구동향

  • 곽호철;조성건;조일제
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.3
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    • pp.103-111
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    • 2003
  • 전자/통신기기에 대한 전자파 장해(EMl/EMS) 문제를 제품개발 기간 내에 완전하게 해결하기란 이론만큼 쉽지 않으며, 전자기적 적합성(EMC)에 대한 지식이 충분하지 못한 회로/기구 설계자들은 전자 파장해 문제를 반복적인 설계 수정 및 디버깅 작업으로 밖에 해결할 수 없는 골치 아픈 Black Magic으로 생각하고 있다. 그러나 분명히 전자기적 간섭(EMI) 문제도 이론 및 해석적인 접근으로 그 해답을 충분히 찾을 수가 있다, 본 고에서는 이러한 PCB Level에서의 전자파장해 문제를 해결하기 위한 체계적인 접근 방법과 오랜 현장 경험에서 나오는 EMC 전문가의 경험적인 지식을 통합한 인공 지능형 EMC 전문가 시스템에 대한 소개와 연구개발 동향 및 극복 과제 등에 대해서 기술하고자 한다.

Chip-level NFP Calibration and Verification Using Improved Probe for NFS Standardization (NFS 표준을 위한 개선된 프로브를 이용한 칩 수준 NFP 측정값 교정 및 검증)

  • Lee, Pil-Soo;Wee, Jae-Kyung;Kim, Boo-Gyoun;Choi, Jai-Hoon;Yeo, Soon-Il
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.6
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    • pp.25-34
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    • 2012
  • New calibration method for the near-field scanning (NFS) system is presented. The proposed calibration method consisted of a new near-field antenna (NFP) and newly devised patterns as circular patch patterns (CPPs) and meander patterns (MPs). The proposed patterns were used for improving spatial resolutions and simplifying a calibration procedure of the NFP compared to the conventional method defined in the IEC61967-3 and 6. Also, the effect of the length of NFPs on attenuation characteristics was investigated with length of 8mm and 30mm. For them, we designed and fabricated CPPs of diameter (D) = 20, 40, 60, and 100mm and MPs of various widths and spaces. We found the reverse relations between spatial resolutions and heights of measuring points by using simplified calibration procedure. The testing result shows that the spatial resolution of $120{\mu}m$ at height of $200{\mu}m$ was verified without complex correlation algorithms under 8GHz. For manufacturing cost all patterns and the NFP were realized with low-cost fabrication using PCB (FR-4) not by a conventional LTCC process. For verification of chip-level EMC from the results, near-field scanning system (NFSS) having step resolution of Sub-micron scale was produced and by using the proposed NFSS and proposed NFP measurement of chip shows accurately the shape of the resolution of $200{\mu}m$ patterns for securing a high level of chip-level EMC verification.

EMI Problem and Solutions of Unusual Harmonics in Low-Speed PCB (저속 PCB에서 이상 고조파의 EMI 문제 및 해결 방안)

  • Kim, Chan-Su;Lee, Hai-Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.7
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    • pp.636-645
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    • 2015
  • In this paper, unusual harmonics noise problem of digital electronic products in mass production was introduced and a practical solution was proposed. Generally, 5th or higher harmonics noise level has been ignored in circuit designs because over 5th harmonics noise decreases by 40 (dB/decade). Through some measurements, it is confirmed that over 10th harmonics noise can propagate and radiate in case of a certain PCB or housing conditions. We propose a capacitively loaded micro-strip low pass filter for commercial products having spatial design constraints and measured the effectiveness. The proposed structure can solve both of the continual increment of harmonics noise level and the spatial design constraint of commercial products. We expect the proposed method be effectively used for various digital electronic products.

Deformation Behavior of MEMS Gyroscope Package Subjected to Temperature Change (온도변화에 따른 MEMS 자이로스코프 패키지의 미소변형 측정)

  • Joo Jin-Won;Choi Yong-seo;Choa Sung-Hoon;Kim Jong-Seok;Jeong Byung-Gil
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.4 s.33
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    • pp.13-22
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    • 2004
  • In MEMS devices, packaging induced stress or stress induced structure deformation become increasing concerns since it directly affects the performance of the device. In this paper, deformation behavior of MEMS gyroscope package subjected to temperature change is investigated using high-sensitivity moire interferometry. Using the real-time moire setup, fringe patterns are recorded and analyzed at several temperatures. Temperature dependent analyses of warpages and extensions/contractions of the package are presented. Linear elastic behavior is documented in the temperature region of room temperature to $125^{\circ}C$. Analysis of the package reveals that global bending occurs due to the mismatch of thermal expansion coefficient between the chip, the molding compound and the PCB. Detailed global and local deformations of the package by temperature change are investigated, concerning the variation of natural frequency of MEMS gyro chip.

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