• Journal of the Korean Society for Precision Engineering
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• v.26 no.6
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• pp.36-40
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• 2009

Development of maskless lithography techniques can provide a potential solution for the photomask cost issue. Furthermore, it could open a market for small scale manufacturing applications. Since femtosecond lasers have been found suitable for processing of a wide range of materials with sub-micrometer resolution, it is attractive to use this technique for maskless lithography. As a femtosecond laser has recently been developed, both of high power and high photon density are easily obtained. The high photon density results in photopolymerization of photoresist whose absorption spectrum is shorter than that of the femtosecond laser. The maskless lithography using the two-photon absorption (TPA) makes micro structures. In this paper, we present a femtosecond laser direct write lithography for submicron PR patterning, which show great potential for future application.

• Proceedings of the Optical Society of Korea Conference
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• 2008.02a
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• pp.207-208
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• 2008

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.300.2-300.2
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• 2013

Periodically shaped pillar-arrays and hole-arrays were fabricated on a Si wafer. Geometric features are similar in a periodic length of 4 ${\mu}m$ and a depth of 2 ${\mu}m$. For the hole-array patterns, positive PR processes were performed. UV exposed PR patterns were removed during a developing process to leave shapes of inversely replicated from a glass photomask. Meanwhile, negative PR processes were taken for the pillar-array patterns. UV exposed PR patterns were remained on a Si substrate having a same feature of patterns of a glass photomask. For an electrical aspect, a pillar structure has a short carrier-collection length resulting in the improved open-circuit voltage of 609 mV from 587 mV of a planar device. An improved performance may be achieved to reduce recombination loss along the patterning surface.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.10
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• pp.23-30
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• 1999

We experimented on the sub 50nm patterning using E-beam lithography system. SAL601 negative E-beam resist was used for this experiment. In order to utilize the maximum ability of E-beam system, firstly, we reduced the PR thickness to 100nm, and the field size to 200 ${um}m$. Then PEB (Post Expose Bake) time/temperature, which is one of the very important factors when SAL601 is used, were reduced for minimum line width. In addition, digitizing is optimized for better results. Quantum wire and quantum dot which can be used for nanoscale memory device, such as single electron memory device, are fabricated using these developed lithography techniques.

• Journal of Information Display
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• v.7 no.3
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• pp.1-4
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• 2006

2.22-inch qVGA $(240{\times}320)$ amorphous silicon thin film transistor liquid active matrix crystal display (a-Si TFT-AMLCD) panel has been successfully demonstrated employing a 2.5 um fine-patterning technology by a wet etch process. Higher resolution 2.22-inch qVGA LCD panel with an aperture ratio of 58% can be fabricated as the 2.5 um fine pattern formation technique is integrated with high thermal photo-resist (PR) development. In addition, a novel concept of unique a-Si TFT process architecture, which is advantageous in terms of reliability, was proposed in the fabrication of 2.22-inch qVGA LCD panel. Overall results show that the 2.5 um fine-patterning is a considerably significant technology to obtain higher aperture ratio for higher resolution a-Si TFT-LCD panel realization.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.74-74
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• 2009

The ArF PR mask was. developed to overcome the limit. of sub 40nm patterning technology with KrF PR. But ArF PR difficult to meet the required PR selectivity by thin PR thickness. So need to the multi-stack mask such as amorphous carbon layer (ACL). Generally capacitively coupled plasma (CCP) etcher difficult to make the high density plasma and inductively coupled plasma (ICP) type etcher is more suitable for multi stack mask etching. Hybrid Coupled Plasma source (HCPs) etcher using the 13.56MHz RF power for ICP source and 2MHz and 27.12MHz for bias power was adopted to improve the process capability and controllability of ion density and energy independently. In the study, the oxide trench which has the multi stack layer process was investigated with the HCPs etcher (iGeminus-600 model DMS Corporation). The results were analyzed by scanning electron microscope (SEM) and it was found that etching characteristic of oxide trench profile depend on the multi-stack mask.

• Journal of the Korean Ceramic Society
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• v.41 no.1
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• pp.13-18
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• 2004

$La_{0.5}Sr_{0.5}CoO_3$ (LSCO) electrodes were prepared on ferroelectric $Sr_{0.9}Bi_{2.1}Ta_2O_9$(SBT) thin films by spin coating method using photosensitive sol-gel solution. Self-patterning technique of photosensitive sol-gel solution has advantages such as simple manufacturing process compared to photoresist/dry etching process. Lanthanum(III) 2-methoxyethoxide, Stronitium diethoxide. Cobalu(II)2-methoxyethoxide were used as starting materials for LSCO electrode. UV irradiation on LSCO thin films lead to decrease solubility by M-O-M bond formation and the solubility difference allows us to obtain self-patternine. There was little composition change of the LSCO thin films between before leaching and after leaching in 2-methoxyethanol. The lowest resistivity of LSCO thin films deposited on $SiO_2$/Si substrate was $1.1{\times}10^{-2}{\Omega}cm$ when the thin film was ennealed at $740^{\circ}C$. The values of Pr/Ps and 2Pr of LSCO/SBT/Pt capacitor on the applied voltage of 5V were 0.51, 8.89 ${\mu}C/cm^2$, respectively.

• Corrosion Science and Technology
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• v.2 no.5
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• pp.243-246
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• 2003

We have used a plasma etching method in order to develop a concave-type Pt electrode capacitor to overcome the limitation of conventional stack-type capacitor in a small critical-dimension (CD) pattern. We have deposited Pt layer on the concave-type structure made by patterning of $SiO_2$ and subsequently we separated the adjacent nodes by etch-back process with photoresist (PR) as a protecting layer.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.834-836
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• 2008

We demonstrated micro-scale conducting polymer patterning based on a selective surface treatment. A substrate with a patterned photoresist was immersed into OTS (Octadecyltrichlosilnae) solution. The protected substrate areas were hydrophilic after removing the PR resist, where a conducting polymer solution was coated selectively by spin-coating method.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1649-1652
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• 2006

2.22-inch qVGA $(240{\times}320)$ amorphous silicon thin film transistor liquid active matrix crystal display (${\alpha}$- Si TFT-AMLCD) panel has been successfully demonstrated employing a 2.5 um fine-patterning technology by a wet etch process. Higher resolution 2.22-inch qVGA LCD panel with an aperture ratio of 58% can be fabricated because the 2.5 um fine pattern formation technique is combined with high thermal photo-resist (PR) development. In addition, a novel concept of unique ${\alpha}$-Si TFT process architecture, which is advantageous in terms of reliability, was proposed in the fabrication of 2.22-inch qVGA LCD panel. Overall results show that the 2.5 um finepatterning is a considerably significant technology to obtain higher aperture ratio for higher resolution ${\alpha}$-Si TFT-LCD panel realization.