• Title, Summary, Keyword: Parallel Computing

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Distributed Parallel Computing Environment for Java (자바를 위한 분산된 병렬 컴퓨팅 환경)

  • 이상윤;김승호
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.41 no.6
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    • pp.23-37
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    • 2004
  • Since java thread is an object which is treated as independent process within one execution space in the multiprocessing environment, we can use it for independent process of parallel processing. Using thread and synchronization mechanism of java enables us to write parallel application program easily. Therefore, a lot of results are exist which is apply the feature of java that support parallel processing to the distributed computing environment. In this paper, we introduce a system of environment that support parallel execution of thread which is included in legacy java program. The system named TORB(Transparent Object Request Broker) enables us parallel execution of legacy java program after simple converting process, since it support the feature of programming transparency. TORB is extended version of distributed programming tool that is published by our research team. And it had only typical distributed processing feature that is execute a specified function at the specified computer.

A Reconfigurable Load and Performance Balancing Scheme for Parallel Loops in a Clustered Computing Environment (클러스터 컴퓨팅 환경에서 병렬루프 처리를 위한 재구성 가능한 부하 및 성능 균형 방법)

  • 김태형
    • Journal of KIISE:Computing Practices and Letters
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    • v.10 no.1
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    • pp.49-56
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    • 2004
  • Load imbalance is a serious impediment to achieving good performance in parallel processing. Global load balancing schemes cannot adequately manage to balance parallel tasks generated from a single application. Dynamic loop scheduling methods are known to be useful in balancing parallel loops on shared-memory multiprocessor machines. However, their centralized nature causes a bottleneck for the relatively small number of processors in a network of workstations because of order-of-magniture differences in communication overheads. Moreover, improvements of basis loops scheduling methods have not effectively dealt with irregularly distributed workloads in parallel loops, which commonly occur in applications for a network of workstation. In this paper, we present a new reconfigurable and decentralized balancing method for parallel loops on a network of workstations. Since our method supplements performance balancing with those tranditional load balancing methods, it minimizes the overall execution time.

Development of the Dynamic Host Management Scheme for Parallel/Distributed Processing on the Web (웹 환경에서의 병렬/분산 처리를 위한 동적 호스트 관리 기법의 개발)

  • Song, Eun-Ha;Jeong, Young-Sik
    • Journal of KIISE:Computing Practices and Letters
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    • v.8 no.3
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    • pp.251-260
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    • 2002
  • The parallel/distributed processing with a lot of the idle hosts on the web has the high coot-performance ratio for large-scale applications. It's processing has to show the solutions for unpredictable status such as heterogeneity of hosts, variability of hosts, autonomy of hosts, the supporting performance continuously, and the number of hosts which are participated in computation and so on. In this paper, we propose the strategy of adaptive tack reallocation based on performance the host job processing, spread out geographically Also, It shows the scheme of dynamic host management with dynamic environment, which is changed by lots of hosts on the web during parallel processing for large-scale applications. This paper implements the PDSWeb (Parallel/Distributed Scheme on Web) system, evaluates and applies It to the generation of rendering image with highly intensive computation. The results are showed that the adaptive task reallocation with the variation of hosts has been increased up to maximum 90% and the improvement in performance according to add/delete of hosts.

Introduction to general purpose GPU computing (GPU를 이용한 범용 계산의 소개)

  • Yu, Donghyeon;Lim, Johan
    • Journal of the Korean Data and Information Science Society
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    • v.24 no.5
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    • pp.1043-1061
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    • 2013
  • Recent advances in computer technology introduce massive data and their analysis becomes important. The high performance computing is one of the most essential part in analysis of massive data. In this paper, we review the general purpose of the graphics processing unit and its application to parallel computing, which has been of great interest in statistics communities.

Optical Pipelined Multi-bus Interconnection Network Intrinsic Topologies

  • d'Auriol, Brian Joseph
    • ETRI Journal
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    • v.39 no.5
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    • pp.632-642
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    • 2017
  • Digital all-optical parallel computing is an important research direction and spans conventional devices and convergent nano-optics deployments. Optical bus-based interconnects provide interesting aspects such as relative information communication speed-up or slow-down between optical signals. This aspect is harnessed in the newly proposed All-Optical Linear Array with a Reconfigurable Pipelined Bus System (OLARPBS) model. However, the physical realization of such communication interconnects needs to be considered. This paper considers spatial layouts of processing elements along with the optical bus light paths that are necessary to realize the corresponding interconnection requirements. A metric in terms of the degree of required physical constraint is developed to characterize the variety of possible solutions. Simple algorithms that determine spatial layouts are given. It is shown that certain communication interconnection structures have associated intrinsic topologies.

Integer-Pel Motion Estimation for HEVC on Compute Unified Device Architecture (CUDA)

  • Lee, Dongkyu;Sim, Donggyu;Oh, Seoung-Jun
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.6
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    • pp.397-403
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    • 2014
  • A new video compression standard called High Efficiency Video Coding (HEVC) has recently been released onto the market. HEVC provides higher coding performance compared to previous standards, but at the cost of a significant increase in encoding complexity, particularly in motion estimation (ME). At the same time, the computing capabilities of Graphics Processing Units (GPUs) have become more powerful. This paper proposes a parallel integer-pel ME (IME) algorithm for HEVC on GPU using the Compute Unified Device Architecture (CUDA). In the proposed IME, concurrent parallel reduction (CPR) is introduced. CPR performs several parallel reduction (PR) operations concurrently to solve two problems in conventional PR; low thread utilization and high thread synchronization latency. The proposed encoder reduces the portion of IME in the encoder to almost zero with a 2.3% increase in bitrate. In terms of IME, the proposed IME is up to 172.6 times faster than the IME in the HEVC reference model.

Analysis of Stator-Rotor Interactions by using Parallel Computer (정익-동익 상호작용의 병렬처리해석)

  • Lee J. J.;Choi J. M.;Lee D. H.
    • 한국전산유체공학회:학술대회논문집
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    • pp.111-114
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    • 2004
  • CFD code that simulates stator-rotor interactions is developed applying parallel computing method. Modified Multi-Block Grid System which enhances perpendicularity in grid and is appropriate in parallel processing is introduced and Patched Algorithm is applied in sliding interface which is caused by movement of rotor. The experimental model in the turbo-machine is composed of 11 stators and 14 rotors. Analyses on two test cases which are one stator - one rotor model and three stators - four rotors model are performed. The results of the two cases have been compared with the experimental test data.

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PCG Algorithms for Development of PC level Parallel Structural Analysis Method (PC level 병렬 구조해석법 개발을 위한 PCG 알고리즘)

  • 박효선;박성무;권윤한
    • Proceedings of the Computational Structural Engineering Institute Conference
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    • pp.362-369
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    • 1998
  • The computational environment in which engineers perform their designs has been rapidly evolved from coarse serial machines to massively parallel machines. Although the recent development of high-performance computers are available for a number of years, only limited successful applications of the new computational environments in computational structural engineering field has been reported due to its limited availability and large cost associated with high-performance computing. As a new computational model for high-performance engineering computing without cost and availability problems, parallel structural analysis models for large scale structures on a network of personal computers (PCs) are presented in this paper. In structural analysis solving routine for the linear system of equations is the most time consuming part. Thus, the focus is on the development of efficient preconditioned conjugate gradient (PCG) solvers on the proposed computational model. Two parallel PCG solvers, PPCG-I and PPCG-II, are developed and applied to analysis of large scale space truss structures.

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Construction and Performance Evaluation of Windows- based Parallel Computing Environment (윈도우즈 기반의 병렬컴퓨팅 환경 구축 및 성능평가)

  • Shin J.-R.;Kim M.-H.;Choi J.-Y.
    • 한국전산유체공학회:학술대회논문집
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    • pp.58-62
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    • 2001
  • Aparallel computing environment was constructed based on Windows 2000 operating system. This cluster was configured using Fast-Ethernet system to hold up together the clients within a network domain. For the parallel computation, MPI implements for Windows such as MPICH.NT.1.2.2 and MP-MPICHNT.1.2 were used with Compaq Visual Fortran compiler which produce a well optimized executives for x86 systems. The evaluation of this cluster performance was carried out using a preconditioned Navier-Stokes code for the 2D analysis of a compressible and viscous flow around a compressor blade. The parallel performance was examined in comparison with those of Linux clusters studied previously by changing a number of processors, problem size and MPI libraries. The result from the test problems presents that parallel performance of the low cost Fast-Ethernet Windows cluster is superior to that of a Linux cluster of similar configuration and is comparable to that of a Myrinet cluster.

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Parallel Computation Algorithm of Gauss Elimination in Power system Analysis (전력계통해석을 위한 자코비안행렬 가우스소거의병렬계산 알고리즘)

  • 서의석;오태규
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.43 no.2
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    • pp.189-196
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    • 1994
  • This paper describes a parallel computing algorithm in Gauss elimination of Jacobian matrix to large-scale power system. The structure of Jacobian matrix becomes different according to ordering method of buses. In sequential computation buses are ordered to minimize the number of fill-in in the triangulation of the Jacobian matrix. The proposed method develops the parallelism in the Gauss elimination by using ND(nested dissection) ordering. In this procedure the level structure of the power system network is transformed to be long and narrow by using end buses which results in balance of computing load among processes and maximization of parallel computation. Each processor uses the sequential computation method to preserve the sqarsity of matrix.

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