• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.615-618
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• 2006

The broadband power detector for direct- onversion Six-port output circuit was designed and implementaed in this paper. The power detector should linearly operated to produce the linear amplitude and phase signal fer input RF signal in required broadband. So, the power detector should be designed under conditions of matching circuit with low VSWR. The designed power detectors, which were implemented in L-band with 50 ohm matching and Ku-band with matching circuit and isolator, respectively, were evaluated in the performances.

• Journal of Satellite, Information and Communications
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• v.1 no.1
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• pp.59-64
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• 2006

The broadband power detector for power amplitude envelope detection of the direct-conversion Six-port output signal was designed and implemented in this paper. The power detector should be linearly operated to produce the linear amplitude and phase signal for input RF signals in required broadband frequency range. The power detector should be designed under conditions of matching circuit with low VSWR, which protect unbalanced phase signal from reflection signal due to mismatch between the output port of a six-port and the input port of a power detector. The designed power detectors, which were implemented in L-band with 50 ohm matching and Ku-band with multiple LC matching circuits and isolator, respectively, were analyzed in viewpoints of the utilization as a power detector of direct conversion Six-port. The dynamic range of designed power detectors were also measured and rvaluated as a power detector of Six-port circuit.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.389-393
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• 2003

This paper describes the design of enhanced TSSI RF Power Detector which has wide dynamic range using switch and Log amp. This Power Detector consists of low and high gain loops, and they adaptively switched by output DC voltage which is proportioned to input power level. Because Power Detector needs to separate the channel, so architecture is heterodyne system having 70MHz intermediate frequency. This proposed RF Power Detector is settle to the satisfaction of Closed loop power control system for W-CDMA optic repeater, and the obtained dynamic range cover the higher than 50dB.

• ETRI Journal
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• v.35 no.3
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• pp.554-557
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• 2013

This letter presents a power amplifier (PA) with an on-chip power detector for 2.4-GHz wireless local area network application. The power detector consists of a clamp circuit, a diode detector, and a coupled line directional coupler. A series inductor for an output matching network in the PA is combined with a through line of the coupler, which reduces the coupling level. Therefore, the coupler employs a metamaterial-based transformer configuration to increase coupling. The amount of coupling is increased by 2.5 dB in the 1:1 symmetric transformer structure and by 4.5 dB from two metamaterial units along the coupled line.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.217-220
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• 2000

In this paper, A low-power MOS monolithic peak detector is presented. Designed for monolithic and low-power characteristics, this MOS peak detector can be integrated easily on the same chip as a module of large communication systems. The simulation results of this peak detector which was composed with four NMOSs and two capacitors show the power dissipation of 0.972㎽ and the good operations for 2㎓ operating pulse frequency. Therefore, it may be used as a functional block for various signal processing systems.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.255-266
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• 2015

In this paper, a low-complexity and low-power soft output multiple input multiple output (MIMO) symbol detector is proposed for mobile devices with two transmit and two receive antennas. The proposed symbol detector can support both the spatial multiplexing mode and spatial diversity mode in single hardware and shows the optimal maximum likelihood (ML) performance. By applying a multi-stage pipeline structure and using a complex multiplier based on the polar-coordinate, the complexity of the proposed architecture is dramatically decreased. Also, by applying a clock-gating scheme to the internal modules for MIMO modes, the power consumption is also reduced. The proposed symbol detector was designed using a hardware description language (HDL) and implemented using a 65nm CMOS standard cell library. With the proposed architecture, the proposed MIMO detector takes up an area of approximately $0.31mm^2$ with 183K equivalent gates and achieves a 150Mbps throughput. Also, the power estimation results show that the proposed MIMO detector can reduce the power consumption by a maximum of 85% for the various test cases.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.4
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• pp.184-188
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• 2006

This paper presents DSP based narrow band satellite communication signal power detector for tracking control of mobile satellite antenna system. An analog filter based conventional power detector has poor performance due to frequency drift of carrier. Also, it is very difficult to change an analog filter bandwidth according to changed bandwidth of transmitted signal. To solve these difficulties, we proposed DSP based signal power detector, which is easy to change bandwidth of filter and to match shifted frequency of carrier. The proposed signal power detector consists of a FFT function to measure frequency drift of carrier, a programmable filter bank function to limit of received signal bandwidth and a power calculation function to measure power of filtered signal in 12-bit linear scale. Test results of implemented signal power detector, based on TMS320C5402 DSP, showed that it satisfied required functions and performances and properly operated.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.3
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• pp.621-627
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• 2008

This paper presents a compact and miniaturized power detector utilizing low temperature co-fired ceramics(LTCC) technology for the application in wireless handset system to monitor the transmitting power at the frequency of 824-849MHz. The proposed power detector is composed of detector diode, lumped components for matching network, and LTCC stripline coupler based on LTCC substrate technology. A 20dB LTCC stripline direction coupler is designed and implemented with many bending section in order to reduce the practically occupied area for miniaturization. A zero bias schottky diode is adopted for detector design because of its high speed operation with minimized loss. The measured performances of fabricated detector agree well with the predicted results with a good linearity within the effective input RF power range.

• Fire Science and Engineering
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• v.26 no.1
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• pp.74-79
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• 2012

This study is described for development of the stand-alone smoke and heat detector (SASHD) according to the revised in 2011 type approval and performance inspection code for detector. The main improvement of the revised regulation is source. CMOS microcontroller with nano watt technology is use for development of the workable SASHD over 10 years. The low-power SASHD is developed by using the power-saving sleep mode of microcontroller, by making the low-power source voltage checker, heat detector and smoke detector. The stand-alone detector is developed by smoke and heat detector type for reduce false fire alarm. User can choose type of work between the heat detection mode and smoke & heat detection mode. The SASHD can communicate with each them using RS-485 communication supported from microcontroller. So, this study can develop the SASHD that is able to alarm more wide area when fire occurs and reduce a flash fire alarm.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.5
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• pp.1000-1006
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• 2007

This paper presents a power detector circuit which monitors the transmitting power for the application in CDMA cell phones. The proposed power detector are composed of coupler for coupling output power and detector fur monitoring output power. The designed coupler has low loss characteristic because it adopts the stripline structure which consists of two ground planes at both sides of signal plane. The design frequency is 824-849MHz which is the Tx band fur CDMA mobile terminal, and the coupling factor of the stripline coupler is -20dB. A schottky barrier diode is adopted for detector design because of its high speed operation with minimized loss. The required impedance matching is performed to improve the linearity and sensitivity of output voltage at relatively low detector input level where the nonlinear characteristic of diode exists. The package parasitics as well as intrinsic diode model are considered for simulation of the detector. The predicted performances agree well with the measured results.