• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.19 no.8
• /
• pp.1839-1844
• /
• 2015

The low-density parity-check(LDPC) code has been adopted in many communication standards due to its error correcting performance, and the quasi-cyclic LDPC(QC-LDPC) is widely used because of implementation easiness. In the QC-LDPC decoder, a cyclic-shifter is required to rotate data in various sizes. This kind of cyclic-shifters are called multi-size circular shifter(MSCS), and this paper proposes a low-complexity structure for MSCS. In the conventional serially-placed two barrel-rotators, the unnecessary multiplexers are revealed and removed, leading to low-complexity. The experimental results show that the area is reduced by about 12%.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.28B no.7
• /
• pp.520-534
• /
• 1991

This paper describes the design of an ALU and a shifter for RISC. The RISC datapath is designed to have a 4-stage pipeline and a 20 MHz operating frequency. The ALU makes use of the 32-bit BLC adder which has the characteristics of high speed ane regular structuer and executes the arithmetic instructions-addition and subtraction- and the logical instructions-AND, OR, and XOR. Additionally, multiplication is possible by iterative executions of step instructions to perform shift and add operations. The shifter is implemented by using the modified of funnel shifter. The shifter is able to perform the arithmetic andlogical shift instructions without maskiog. Moreover, it carries out data align operation which conforms to big endian byte address. The logical operation of the desinged ALU and the shifter were simulated using YSLOG and VLSIsim. SPICE simulation results using 1.2um double metal process parameters show that the ALU and shifter have a delay time of 15.9NS and 9.9NS, respectively. Therefore, the ALU and the shifter operates correctly above 20[ MHz ] click ferquency and are composed of about 7K and 15K teansistors, respectively.

• ETRI Journal
• /
• v.25 no.1
• /
• pp.19-24
• /
• 2003

This paper describes the performance of a Ku-band 5-bit monolithic phase shifter with metal semiconductor field effect transistor (MESFET) switches and the implementation of a ceramic packaged phase shifter for phase array antennas. Using compensation resistors reduced the insertion loss variation of the phase shifter. Measurement of the 5-bit phase shifter with a monolithic microwave integrated circuit demonstrated a phase error of less than $7.5{\circ}$ root-mean-square (RMS) and an insertion loss variation of less than 0.9 dB RMS for 13 to 15 GHz. For all 32 states of the developed 5-bit phase shifter, the insertion losses were $8.2{\pm}1.4$dB, the input return losses were higher than 7.7 dB, and the output return losses were higher than 6.8 dB for 13 to 15 GHz. The chip size of the 5- bit monolithic phase shifter with a digital circuit for controlling all five bits was 2.35 mm ${\times}$1.65 mm. The packaged phase shifter demonstrated a phase error of less than $11.3{\circ}$ RMS, measured insertion losses of 12.2 ${\pm}$2.2 dB, and an insertion loss variation of 1.0 dB RMS for 13 to 15 GHz. For all 32 states, the input return losses were higher than 5.0 dB and the output return losses were higher than 6.2 dB for 13 to 15 GHz. The size of the packaged phase shifter was 7.20 mm${\times}$ 6.20 mm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2003.05a
• /
• pp.97-99
• /
• 2003

Novel asymmetric 45$^{\circ}$ Schiffman phase shifter having l-coupling for 2.3GHz applications is presented along with measurement results. The proposed phase shifter with a Teflon substrate is fabricated in a smaller area and cost-effective way as compared to the conventional Schiffman phase shifter. In addition, the characteristics of the fabricated phase shifter is extracted and compared. The proposed phase shifter seems useful particularly for the future 2.3GHz wireless applications.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.13 no.6
• /
• pp.12-15
• /
• 1976

This paper presents the realization method of 90$^{\circ}$ constant phase shifter in the VHF band, constructed by the entirely differens idea from the conventional method of the realization of constant phase shifter in the audio frequency range. The construction of 90$^{\circ}$ constant phase shifter is. simple and can be easily realized by using the distributed constant element, transmission line, and the lumped constant elements, R,C,L.

• Journal of Information Display
• /
• v.11 no.1
• /
• pp.21-23
• /
• 2010

A new level shifter using low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs) for low-power applications is proposed. The proposed level shifter uses a capacitive-coupling effect and can reduce the power consumption owing to its no-short-circuit current. Its power saving over the conventional level shifter is 72% for a 3.3 V input and a 10 V output.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2008.10a
• /
• pp.20-23
• /
• 2008

We proposed a-Si:H TFT (hydrogenated amorphous silicon thin film transistor) level shifter which reduced number of power sources. To reduce the number of power sources from four to two, modified bootstrapped inverter was used for the level shifter. The shift register was verified by PSPICE circuit simulation and fabricated. The fabricated level shifter successfully shifted low input (0 to 5 V) to high level output (-7 to 23 V).

• Proceedings of the IEEK Conference
• /
• 1999.11a
• /
• pp.825-828
• /
• 1999

In this paper, we design the analog phase shifter for the elimination of the ghost signal. Compensation of the delay between the reference signal and the relatively delayed signal is possible. This phase shifter uses the vector summing method. We use for the attenuator in our system FETs. The phase shifter is operated at the 200MHz and composed by lumped elements. The proposed analog phase shifter is simulated by the HP ADS software.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.747-750
• /
• 2005

In this paper, we propose a new level shifter circuit for reducing power consumption. The concept of the proposed level shifter is to use capacitive coupling effect to reduce short circuit current. The power consumption of the proposed level shifter is reduced up to 50%, compared to the conventional level shifter. Especially the proposed level shifter circuit works well with low temperature poly-Si (LTPS) TFTs. It can operate on low input voltage even with low-mobility, high and widely-varying threshold voltage of LTPS TFT.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.32A no.1
• /
• pp.89-96
• /
• 1995

Lateral p-i-n photodiodes have been fabricated, electrically tested, and incorporated into microwave control circuits such as an optically excited microwave atttenuator and reflection type phase shifter. Circuit design procedures for the loaded-line phase shifter with the optically controlled p-i-n photodiode are presented. The equal loss loading mode presented for the first time for the phase shifter circuits with lossy load allows an equal insertion loss of the phase shifter in both of its phase states. It is found that the insertion loss of the equal loss loading mode phase shifter constructed with the fabricated p-i-n photodiode load are about 3dB for 11.25$^{\circ}$ bit and 1dB for 5.625$^{\circ}$ bit for the frequency range of 2GHz to 11GHz.