• 한국정보통신학회논문지
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• 제19권8호
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• pp.1839-1844
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• 2015

Low-density parity-check(LDPC) 코드는 우수한 에러 정정 능력으로 인해 점점 많은 통신 표준에서 채택되고 있으며 그 중 구현이 용이한 quasi-cyclic LDPC(QC-LDPC)가 많이 사용되고 있다. QC-LDPC 복호기에서는 데이터들을 rotation할 수 있는 cyclic-shifter가 필요하며, 이 cyclic-shifter는 다양한 크기의 rotation을 수행할 수 있어야 한다. 이러한 cyclic-shifter를 multi-size circular shifter(MSCS)라고 부르며, 이 논문에서는 MSCS를 적은 면적으로 구현한 구조를 제안한다. 기존의 직렬로 배치된 barrel-rotator 구조에서 rotation의 성질을 이용하여 필요 없는 멀티플렉서를 가려내고 이들을 제거함으로써 저면적을 구현하였다. 실험 결과 면적을 약 12% 줄일 수 있었다.

• 전자공학회논문지B
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• 제28B권7호
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• pp.520-534
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• 1991

This paper describes the design of an ALU and a shifter for RISC. The RISC datapath is designed to have a 4-stage pipeline and a 20 MHz operating frequency. The ALU makes use of the 32-bit BLC adder which has the characteristics of high speed ane regular structuer and executes the arithmetic instructions-addition and subtraction- and the logical instructions-AND, OR, and XOR. Additionally, multiplication is possible by iterative executions of step instructions to perform shift and add operations. The shifter is implemented by using the modified of funnel shifter. The shifter is able to perform the arithmetic andlogical shift instructions without maskiog. Moreover, it carries out data align operation which conforms to big endian byte address. The logical operation of the desinged ALU and the shifter were simulated using YSLOG and VLSIsim. SPICE simulation results using 1.2um double metal process parameters show that the ALU and shifter have a delay time of 15.9NS and 9.9NS, respectively. Therefore, the ALU and the shifter operates correctly above 20[ MHz ] click ferquency and are composed of about 7K and 15K teansistors, respectively.

• ETRI Journal
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• 제25권1호
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• pp.19-24
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• 2003

This paper describes the performance of a Ku-band 5-bit monolithic phase shifter with metal semiconductor field effect transistor (MESFET) switches and the implementation of a ceramic packaged phase shifter for phase array antennas. Using compensation resistors reduced the insertion loss variation of the phase shifter. Measurement of the 5-bit phase shifter with a monolithic microwave integrated circuit demonstrated a phase error of less than $7.5{\circ}$ root-mean-square (RMS) and an insertion loss variation of less than 0.9 dB RMS for 13 to 15 GHz. For all 32 states of the developed 5-bit phase shifter, the insertion losses were $8.2{\pm}1.4$dB, the input return losses were higher than 7.7 dB, and the output return losses were higher than 6.8 dB for 13 to 15 GHz. The chip size of the 5- bit monolithic phase shifter with a digital circuit for controlling all five bits was 2.35 mm ${\times}$1.65 mm. The packaged phase shifter demonstrated a phase error of less than $11.3{\circ}$ RMS, measured insertion losses of 12.2 ${\pm}$2.2 dB, and an insertion loss variation of 1.0 dB RMS for 13 to 15 GHz. For all 32 states, the input return losses were higher than 5.0 dB and the output return losses were higher than 6.2 dB for 13 to 15 GHz. The size of the packaged phase shifter was 7.20 mm${\times}$ 6.20 mm.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2003년도 춘계종합학술대회
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• pp.97-99
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• 2003

커플링 수가 1개이고, 2.3GHz에서 사용할 수 있는 새로운 45$^{\circ}$ Schiffman 위상 천이기가 측정 결과와 함께 제시되었다. 제안한 테플론 기반 위상 천이기는 기존의 Schiffman 위상 천이기에 비해 더 작은 면적과 저 비용으로 제작할 수 있다. 이외에도 제작된 위상 천이기의 특성들이 추출되었고 또한 비교되었다. 제안한 위상 천이기는 특히 장래 2.3GHz 무선 응용에 유용할 것으로 보인다.

• 대한전자공학회논문지
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• 제13권6호
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• pp.12-15
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• 1976

본논문은 현재 AF주파수변역에서 90° 정위상기를 실현하고 있는 방법과는 전혀 다른 착상으로 VHF 고파수대에서 90° 정위상기를 실현하는 새로운 방법을 제시하였다. 이 90° 정위상기의 구조는 간단하며 분포정수소자인 전송선과 집중정수소자인 R.L.C로 용이하게 실현된다. This paper presents the realization method of 90° constant phase shifter in the VHF band, constructed by the entirely differens idea from the conventional method of the realization of constant phase shifter in the audio frequency range. The construction of 90° constant phase shifter is. simple and can be easily realized by using the distributed constant element, transmission line, and the lumped constant elements, R,C,L.

• Journal of Information Display
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• 제11권1호
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• pp.21-23
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• 2010

A new level shifter using low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs) for low-power applications is proposed. The proposed level shifter uses a capacitive-coupling effect and can reduce the power consumption owing to its no-short-circuit current. Its power saving over the conventional level shifter is 72% for a 3.3 V input and a 10 V output.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.20-23
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• 2008

We proposed a-Si:H TFT (hydrogenated amorphous silicon thin film transistor) level shifter which reduced number of power sources. To reduce the number of power sources from four to two, modified bootstrapped inverter was used for the level shifter. The shift register was verified by PSPICE circuit simulation and fabricated. The fabricated level shifter successfully shifted low input (0 to 5 V) to high level output (-7 to 23 V).

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.825-828
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• 1999

In this paper, we design the analog phase shifter for the elimination of the ghost signal. Compensation of the delay between the reference signal and the relatively delayed signal is possible. This phase shifter uses the vector summing method. We use for the attenuator in our system FETs. The phase shifter is operated at the 200MHz and composed by lumped elements. The proposed analog phase shifter is simulated by the HP ADS software.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.747-750
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• 2005

In this paper, we propose a new level shifter circuit for reducing power consumption. The concept of the proposed level shifter is to use capacitive coupling effect to reduce short circuit current. The power consumption of the proposed level shifter is reduced up to 50%, compared to the conventional level shifter. Especially the proposed level shifter circuit works well with low temperature poly-Si (LTPS) TFTs. It can operate on low input voltage even with low-mobility, high and widely-varying threshold voltage of LTPS TFT.

• 전자공학회논문지A
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• 제32A권1호
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• pp.89-96
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• 1995

Lateral p-i-n photodiodes have been fabricated, electrically tested, and incorporated into microwave control circuits such as an optically excited microwave atttenuator and reflection type phase shifter. Circuit design procedures for the loaded-line phase shifter with the optically controlled p-i-n photodiode are presented. The equal loss loading mode presented for the first time for the phase shifter circuits with lossy load allows an equal insertion loss of the phase shifter in both of its phase states. It is found that the insertion loss of the equal loss loading mode phase shifter constructed with the fabricated p-i-n photodiode load are about 3dB for 11.25$^{\circ}$ bit and 1dB for 5.625$^{\circ}$ bit for the frequency range of 2GHz to 11GHz.