• Proceedings of the Optical Society of Korea Conference
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• 2000.08a
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• pp.162-163
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• 2000

We have observed the short-channel effect, narrow-channel effect and small-geometry effect in terms of a variation of the threshold voltage. For a short-channel effect the threshold voltage was largely determined by the DIBL effect which stimulates more carrier injection in the channel by reducing the potential barrier between the source and channel. The effect becomes more significant for a shorter-channel device. However, the potential, field and current density distributions in the channel along the transverse direction showed a better uniformity for shorter-channel devices under the same voltage conditions. The uniformity of the current density distribution near the drain on the potential minimum point becomes worse with increasing the drain voltage due to the enhanced DIBL effect. This means that considerations for channel-width effect should be given due to the variation of the channel distributions for short-channel devices. For CCDs which are always operated at a pinch-off state the channel uniformity thus becomes significant since they often use a device structure with a channel length of > 4 ${\mu}{\textrm}{m}$ and a very high drain (or diffusion) voltage. (omitted)

• Journal of Electrical Engineering and Technology
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• v.2 no.2
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• pp.267-273
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• 2007

A depletion-mode MOSFET has been analyzed to evaluate its electrical behavior using a novel 3-D numerical simulation package. The characterizing analysis of the BC MOSFET was performed through short-channel narrow-channel and small-geometry effects that are investigated, in detail, in terms of the threshold voltage. The DIBL effect becomes significant for a short-channel device with a channel length of $<\;3({\mu}m)$. For narrow-channel devices the variation of the threshold voltage was sharp for $<4({\mu}m)$ due to the strong narrow-channel effect. In the case of small-geometry devices, the shift of the threshold voltage was less sensitive due to the combination of the DIBL and substrate bias effects, as compared with that observed from the short-channel and narrow-channel devices. The characterizing analysis of the narrow-channel and small-geometry devices, especially with channel width of $<\;4({\mu}m)$ and channel area of $<\;4{\times}4({\mu}m^2)$ respectively, can be accurately performed only from a 3-D numerical simulation due to their sharp variations in threshold voltages.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.11
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• pp.1290-1298
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• 1992

In this paper, the Poisson's equation is solved two-dimensionally without employing any fitting parameters, and the model formulation of a short-channel MOSFET is accomplished fully analytically. It automatically derives a very accurate drain current expression that can be used simultaneously for strong inversion, subthreshold, and saturation regions. Furthermore, this model gives a unified explanation for the short-channel effect, the body effect, the DIBL effect, and even the variation of the effective carrier mobility. The obtained expression of the threshold voltage also includes the dependence on the oxide thickness, the n+ junction depth, and temperature.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.4
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• pp.1-7
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• 1985

In this paper, a more improved threshold voltage model dependent on drain voltage and substrate bias for short - channel enhancement - mode IGFET is presented. Especially, compared with the several recently published models, the error is sufficiently reduced with the precise analysis on the correction factor for short-channel effect and the calculated values using this model are also agreed well with the experimental data about 1$\mu$m - channel length device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.3
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• pp.213-223
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• 2013

A unified channel thermal noise model valid in all operation regions is presented for short channel MOS transistors. It is based on smooth interpolation between weak and strong inversion models and consistent physical model including velocity saturation, channel length modulation, and carrier heating. From testing for noise benchmark and comparing with published noise data, it is shown that the proposed noise model could be useful in simulating the MOSFET channel thermal noise in all operation regions.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.359-363
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• 2011

To integrate the sensor driver and logic circuits, fabricating down scaled transistors has been main issue. At this research, short channel effects were analyzed after n channel polycrystalline silicon thin film transistor was fabricated at high temperature. As a result, on current, on/off current ratio and transconductance were increased but threshold voltage, electron mobility and s-slope were reduced with a decrease of channel length. When carriers that develop at grain boundary in activated polycrystalline silicon have no gate biased, on current was increased with punch through by drain current. Also, due to BJT effect (parallel bipolar effect) that developed under region of channel by increase of gate voltage on current was rapidly increased.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.8
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• pp.126-132
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• 1995

The electrical stress of short channel polycrystalline silicon (poly-Si) thin film transistor (TFT) has been investigated. The device characteristics of short channel poly-Si TFT with 5$\mu$m channel length has been observed to be significantly degraded such as a large shift in threshold voltage and asymmetric phenomena after the electrical stress. The dominant degradation mechanism in long channel poly-Si TFT's with 10$\mu$m and 20$\mu$m channel length respectively is charage trappling in gate oxide while that in short channel device with 5.mu.m channel length is defect creation in active poly-Si layer. We propose that the increased defect density within depletion region near drain junction due to high electric field which could be evidenced by kink effect, constitutes the important reason for this significant degradation in short channel poly-Si TFT. The proposed model is verified by comparing the amounts of the defect creation and the charge trapping from the strechout voltage.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.691-694
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• 2003

Density gradient method is used to analyze the quantum effect in MOSFET, Quantization effect in the poly gate leads to a negative threshold voltage shift, which is opposed to the positive shift caused by quantization effect in the channel. Quantization effects in the poly gate are investigated using the density gradient method, and the impact on the short channel effect of double gate device is more significant.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.11
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• pp.517-525
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• 2002

The channel region of seep-sub-micrometer MOSFET is non-uniformly doped with pocket implant. Therefore, the advanced threshold voltage model is needed to account for the Short-Channel Effect and Reverse-Short-Channel Effect due to the non-uniform doping concentration in the channel region. In this paper, A scalable analytical model for the MOSFET threshold voltage is developed. The developed model is verified with MEDICI and TSUPREM simulator.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.749-752
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• 2014

The device performance of n-channel MuGFET with different fin width, existence of spacer and channel length has been characterized. Tri-Gate structure(fin number=10) has been used. There are four kinds of Tri-Gate with fin width=55nm with spacer, fin width=70nm with spacer, fin width=55nm without spacer, fin width=70nm without spacer. DIBL, subthreshold swing, Vt roll-off, (above Short Channel Effect)and hot carrier stress degradation have been measured. From the experiment results, short Channel Effect with spacer was decreased, hot carrier degradation with spacer and narrow fin width was decreased. Therefore, layout of LDD structure with spacer and narrow fin width is desirable in short channel effect and hot carrier degradation.