• 제목/요약/키워드: Si-on-insulator

검색결과 363건 처리시간 0.026초

Theoretical Study of Electron Mobility in Double-Gate Field Effect Transistors with Multilayer (strained-)Si/SiGe Channel

  • Walczak, Jakub;Majkusiak, Bogdan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권3호
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    • pp.264-275
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    • 2008
  • Electron mobility has been investigated theoretically in undoped double-gate (DG) MOSFETs of different channel architectures: a relaxed-Si DG SOI, a strained-Si (sSi) DG SSOI (strained-Si-on-insulator, containing no SiGe layer), and a strained-Si DG SGOI (strained-Si-on-SiGe-on-insulator, containing a SiGe layer) at 300K. Electron mobility in the DG SSOI device exhibits high enhancement relative to the DG SOI. In the DG SGOI devices the mobility is strongly suppressed by the confinement of electrons in much narrower strained-Si layers, as well as by the alloy scattering within the SiGe layer. As a consequence, in the DG SGOI devices with thinnest strained-Si layers the electron mobility may drop below the level of the relaxed DG SOI and the mobility enhancement expected from the strained-Si devices may be lost.

이중 절연막 구조를 가전 플라스틱 유기 박막트랜지스터의 전기적 특성 (Electrical Characteristics of Organic Thin Film Transistors with Dual Layer Insulator on Plastic Substrates)

  • 최승진;이인규;박성규;김원근;문대규
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.194-197
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    • 2002
  • Applying dual layer insulator on plastic substrates improved electrical characteristics of organic thin film transistor(TFT). A high-quality silicon dioxide(SiO$_2$) suitable for a insulator was deposited on plastic substrates by e-beam evaporation at 110$^{\circ}C$. The insulator film which was treated by N$_2$ annealing at 150$^{\circ}C$ showed excellent I-V, C-V characteristics. The dual layer insulator structure of polyimide-SiO$_2$ improved the roughness of SiO$_2$ surface and showed very low leakage current. In addition, the flat band voltage has been reduced from -2.5V to about 0.5V.

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$Si/Al_2O_3/Si$ 형태의 SOI(SOS) LIGBT 구조에서의 열전도 특성 분석 (The thermal conductivity analysis of the SOI LIGBT structure using $Al_2O_3$)

  • 김제윤;김재욱;성만영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 추계학술대회 논문집 Vol.16
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    • pp.163-166
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    • 2003
  • The electrothermal simulation of high voltage LIGBT(Lateral Insulated Gate Bipolar Transistor) in thin Silicon on insulator (SOI) and Silicon on sapphire (SOS) for thermal conductivity and sink is performed by means of MEDICI. The finite element simulations demonstrate that the thermal conductivity of the buried oxide is an important parameter for the modeling of the thermal behavior of silicon-on-insulator (SOI) devices. In this paper, using for SOI LIGBT, we simulated electrothermal for device that insulator layer with $SiO_2\;and\;Al_2O_3$ at before and after latch up to measured the thermal conductivity and temperature distribution of whole device and verified that SOI LIGBT with $Al_2O_3$ insulator had good thermal conductivity and reliability

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Silicon-on-insulator(SOI) 기판이 3C-SiC/Si 박막 내의 잔류응력에 미치는 영향 (Effects of silicon-on-insulator(SOI) substrates on the residual stress within 3C-SiC/Si thin films)

  • 박주훈;이병택;장성주;송호준;김영만;문찬기
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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    • pp.151-151
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    • 2003
  • 열화학기상증착법(Thermal-CVD)을 이용하여 SOI(snilicon-on-insulator)기판과 실리콘기판 상에 단결정 3C-SiC 이종박막을 동시에 성장하고, 그 특성을 비교 분석하였다. 결정성 평가로는 X-선 회절(XRD)분석과 Raman 산란 분광분석, 그리고 투과전자현미경을 이용하였고, 잔류 웅력 비교 분석으로는 laser scanning 방법 과 Raman 산란 분광분석의 3C-SiC LO peak의 위치변화, 그리고 X-선 회절분석의 3C-SiC(004) peak의 위치변화를 이용하였다. 그 결과 SOI 기판과 실리콘 기판상에 고품위의 단결정 3C-SiC 박막이 성장됨을 확인하였고, SOI 기판을 사용한 경우 실리콘 기판에 비해 성장된 3C-SiC 이종박막의 잔류 응력이 실제로 감소됨을 확인하였다.

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쇼키컨텍에 의한 박막형 트랜지스터의 전기적 특성 (Electrical Characteristics of Thin Film Transistor According to the Schottky Contacts)

  • 오데레사
    • 한국재료학회지
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    • 제24권3호
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    • pp.135-139
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    • 2014
  • To obtain the transistor with ambipolar transfer characteristics, IGZO/SiOC thin film transistor was prepared on SiOC with various polarities as a gate insulator. The interface between a channel and insulator showed the Ohmic and Schottky contacts in the bias field of -5V ~ +5V. These contact characteristics depended on the polarities of SiOC gate insulators. The transfer characteristics of TFTs were observed the Ohmic contact on SiOC with polarity, but Schottky contact on SiOC with low polarity. The IGZO/SiOC thin film transistor with a Schottky contact in a short range bias electric field exhibited ambipolar transfer characteristics, but that with Ohmic contact in a short range electric field showed unipolar characteristics by the trapping phenomenon due to the trapped ionized defect formation.

Basic characteristics of metal-ferroelectric-insulator-semiconductor structure using a high-k PrOx insulator layer

  • Noda, Minoru;Kodama, Kazushi;Kitai, Satoshi;Takahashi, Mitsue;Kanashima, Takeshi;Okuyama, Masanori
    • E2M - 전기 전자와 첨단 소재
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    • 제16권9호
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    • pp.64.1-64
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    • 2003
  • A metal-ferroelectric [SrBi$_2$Ta$_2$O$\_$9/ (SBT)-high-k-insulator(PrOx)-semiconductor(Si) structure has been fabricated and evaluated as a key part of metal-ferroelectric-insulator-semiconductor-field-effect-transistor MFIS-FET memory, aiming to improve the memory retention characteristics by increasing the dielectric constant in the insulator layer and suppressing the depolarization field in the SBT layer. A 20-nm PrOx film grown on Si(100) showed both a high of about 12 and a low leakage current density of less than 1${\times}$ 10e-8 A/$\textrm{cm}^2$ at 105 MV/cm. A 400-nm SBT film prepared on PrOx/Si shows a preferentially oriented (105) crystalline structure, grain size of about 130 nm and subface roughness of 3.2 nm. A capacitance-voltage hysteresis is confirmed on the Pt/SBT/PrOx/Si diode with a memory window of 0.3V at a sweep voltage width of 12 V. The memory retention time was about 1 104s, comparable to the conventional Pt/SBT/SiO$\_$x/N$\_$y/(SiO$\_$N/)/Si. The gradual change of the capacitance indicates that some memory degradation mechanism is different from that in the Pt/SBT/SiON/Si structure.

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Effective ELA for Advanced Si TFT System on Insulator

  • Noguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.45-48
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    • 2006
  • Effectiveness and its possibility of ELA (Excimer Laser Annealing) for advanced Si TFT system on insulator are described. Currently, extensive study is carried out to realize an advanced SoG (System on Glass) based on LTPS (Low Temperature Poly-Si) technique. By reducing further the process temperature and by improving the fabrication process of LTPS, addressing TFT circuits for FPD (Flat Panel Display) can be mounted onto a flexible plastic as well as onto a glass substrate. Functional devices on the insulating panels are developed to be formed by using ELA. Although technical issues are remained for the fabrication process, Si transistors including 3D TFT structure formed by ELA is expected as a functional Si system on insulator in the ubiquitous IT era.

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放射線이 照射된 MIS capacitor의 電荷 蓄積 및 flat band 전압 이동에 대한 實驗 및 數値的 硏究 (Experiments & numerical analysis of charge accumulation and flat band voltage shifts in irradiated MIS capacitor)

  • 황금주;김홍배;손상희
    • 대한전기학회논문지
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    • 제44권4호
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    • pp.483-489
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    • 1995
  • To investigate the mechanism generated by irradiation in the insulator layer irradiated MIS (Metal - Insulator - Semiconductor) device, the various types of MIS capacitors depending on insulator thickness, insulator types and implanted impurities are fabricated on the P-type wafer. MIS capacitors exposed by 1Mrad Co$^{60}$ .gamma.-ray are measured for flat band voltage and charge density shifts pre- and post-irradiation. The measuring results of post-irradiation show the flat band voltage shifting toward negative direction and charge density increasing regardless of parameters. This results have a good agreement with calculated data by computer simulation. Si$_{3}$N$_{4}$ layers have a good radiation-hardness than SiO$_{2}$ layers compared to the results of post-irradiation. Also, radiation-induced negative trap is discovered in the implanted insulator layer. Using numerical analysis, four continuty equations (conduction-band electrons continuity equation, valence-band holes continuity equation, trapped electrons continuity equation, trapped holes continuity equation) are solved and charge distributions according to the distance and Si-Insulator interface states are investigated.

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이산화탄소를 이용한 ZTO 박막의 이동도와 안정성분석 (Element Analysis related to Mobility and Stability of ZTO Thin Film using the CO2 Gases)

  • 오데레사
    • 한국재료학회지
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    • 제28권12호
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    • pp.758-762
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    • 2018
  • The transfer characteristics of zinc tin oxide(ZTO) on silicon dioxide($SiO_2$) thin film transistor generally depend on the electrical properties of gate insulators. $SiO_2$ thin films are prepared with argon gas flow rates of 25 sccm and 30 sccm. The rate of ionization of $SiO_2$(25 sccm) decreases more than that of $SiO_2$(30 sccm), and then the generation of electrons decreases and the conductivity of $SiO_2$(25 sccm) is low. Relatively, the conductivity of $SiO_2$(30 sccm) increases because of the high rate of ionization of argon gases. Therefore, the insulating performance of $SiO_2$(25 sccm) is superior to that of $SiO_2$(30 sccm) because of the high potential barrier of $SiO_2$(25 sccm). The $ZTO/SiO_2$ transistors are prepared to research the $CO_2$ gas sensitivity. The stability of the transistor of $ZTO/SiO_2$(25 sccm) as a high insulator is superior owing to the high potential barrier. It is confirmed that the electrical properties of the insulator in transistor devices is an important factor to detect gases.

Effect of Bottom Electrode on Resistive Switching Voltages in Ag-Based Electrochemical Metallization Memory Device

  • Kim, Sungjun;Cho, Seongjae;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권2호
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    • pp.147-152
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    • 2016
  • In this study, we fabricated Ag-based electrochemical metallization memory devices which is also called conductive-bridge random-access memory (CBRAM) in order to investigate the resistive switching behavior depending on the bottom electrode (BE). RRAM cells of two different layer configurations having $Ag/Si_3N_4/TiN$ and $Ag/Si_3N_4/p^+$ Si are studied for metal-insulator-metal (MIM) and metal-insulator-silicon (MIS) structures, respectively. Switching voltages including forming/set/reset are lower for MIM than for MIS structure. It is found that the workfunction different affects the performances.