• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2002.10b
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• pp.433-434
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• 2002

Chemical mechanical polishing refers to a process by which silicon and partially-processed integrated circuits (IC's) built on silicon substrates are polished to produce planar surfaces for the continued manufacturing of IC's. Chemical mechanical polishing is done by pressing the silicon wafer, face down, onto a rotating platen that is covered by a rough polyurethane pad. During rotation, the pad is flooded with a slurry that contains nanoscale particles. The pad deforms and the roughness of the surface entrains the slurry into the interface. The asperities contact the wafer and the surface is polished in a three-body abrasion process. The contact of the wafer with the 'soft' pad produces a unique elastohydrodynamic situation in which a suction force is imposed at the interface. This added force is non-uniform and can be on the order of the applied pressure on the wafer. We have measured the magnitude and spatial distribution of this suction force. This force will be described within the context of a model of the sliding of hard surfaces on soft substrates.

• Journal of Digital Contents Society
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• v.3 no.1
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• pp.113-122
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• 2002

The flatness of a silicon wafer concerned with ULSI chip is one of the most critical parameters ensuring high yield of wafers. The polishing process that measures and controls the flatness of a silicon wafer is one of the important process in various processes for production silicon wafer, which are still being done today by manual. But engineers in polishing process are requested to have many experiences and to check silicon wafers one by one. In this paper, we propose an algorithm used interpolation that estimates wafer's shape and sorts wafers automatically, then we can control the flatness of wafers in polishing process by automatic system.

• 한국태양에너지학회:학술대회논문집
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• 2011.04a
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• pp.101-104
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• 2011

Many studies in crystalline silicon solar cell fabrication have been focused on high efficiency and low cost. In this paper, we carried out the doping procedure by varying the silicon wafer thicknesses and sheet resistance. The silicon wafers with various thicknesses were obtained by shiny etching and texturing. The thicknesses of wafers were 100, 120, 150, and $180{\mu}m$. The emitter layer formed by $POCl_3$ doping process had sheet resistance with 40 and $80{\Omega}/sq$ for selective emitter application. This experiment indicated wafer thickness did not influence sheet resistance but lifetime was strongly effected.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.04a
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• pp.1058-1062
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• 1997

Development of laser induced chemical etching technologt with KrF laser are carried out in this study for micromachining of silicon wafer. The paper is devoted to experimental identification of excimer laser induced mechanism of silicon under chlorine pressures(0.02~500torr). Experimental results on pulsed KrF excimer laser etching of silicon in chorine atmosphere are presented. Etching rate dependency on laser fluence and chlorine pressure are discussed on the basis of experimental analysis, it is concluded that accurate digital micro machining process of silicon wafer can achieved by KrF laser induced chemical etching technology.

• Clean Technology
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• v.18 no.1
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• pp.43-50
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• 2012

Cleaning procedure of solar silicon wafer, following ingot sawing process in solar cell production is studied. Types of solar silicon wafer can be divided into monocrystalline or multicrystalline, and slurry sawn wafer or diamond sawn wafer according to the ingot growing methods and the sawing methods, respectively. Wafer surface and contaminants can vary with these methods. The characterisitics of contaminants and wafer surface are investigated for each cleaning substrate, and appropriate cleaning agents are developed. Physical properties and cleaning ability of the cleaning agents are evaluated in order to verify the application in the industry. The wafers cleaned with the cleaning agents do not show any residual contaminants when analyzed by XPS and regular patterns are formed after texturization. Furthermore, the cleaning agents are applied in the production industry, which shows superior cleaning results compared to the existing cleaning agents.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.5
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• pp.106-111
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• 2007

After the semiconductor processing, wafer is attracted by ESC(Electrostatic Chuck) with remaining electric charge. That causes too many problems for examples, sliding of wafer, popping or broken. This paper presents the model of ESC for silicon wafer, which is modeled by electrical circuit component such as capacitor. The simulations using PSpice result in the phenomenon of silicon wafer was charged by ESC. In this paper we suggest the discharging method. for wafer.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.10
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• pp.26-33
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• 2004

Ultra precision grinding technology has been developed from the refinement of the abrasive, the development of high stiffness equipment and grinding skill. The conventional wafering process which consists of lapping, etching, 1 st, 2nd and 3rd polishing has been changed to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Furthermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focuses on the flatness of the ground wafer. Generally, the ground wafer has concave pronto because of the difference of wheel path density, grinding temperature and elastic deformation of the equipment. Wafer tilting is applied to avoid non-uniform material removal. Through the geometric analysis of wafer grinding process, the profile of the ground wafer is predicted by the development of profile simulator.

• Proceedings of the KSME Conference
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• 2007.05b
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• pp.2032-2037
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• 2007

Numerical analysis was conducted to investigate the atomic layer deposition(ALD) of silicon nitride using silane and ammonia as precursors. The present study simulated the surface reactions for as-deposited $Si_3N_4$ as well as the kinetics for the reactions of $SiH_4$ and $NH_3$on the semiconductor wafer. The present numerical results showed that the ALD process is dependent on the activation constant. It was also shown that the low activation constant leads to the self-limiting reaction required for the ALD process. The inlet and wafer temperatures were 473 K and 823 K, respectively. The system pressure is 2 Torr.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.850-853
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• 1992

A cryogenic electron cyclotron resonance plasma etching system has been built to study wafer-temperature in the silicon etching characteristics. The wafer temperature was controlled from -150 to +30 $^{\circ}C$ during etching using the liquid nitrogen cooled helium gas. Although silicon was etched isotropically in $SF_6$ plasma at room temperatures, we found that it is possible to suppress the etch undercut in Si by reducing a substrate temperature without side wall passivation. In addition, the selectivity of silicon to photoresist was improved considerably at a low wafer temperature. Etch rates, anisotropy and selectivity to photo resist are measured as a function of the wafer temperature in the region of -125 $\sim$ 25$^{\circ}C$ and rf bias power of 20W $\sim$ 80W.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.11 no.5
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• pp.58-64
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• 2002

Mirror surface finish of Si-wafers has been achieved by rotary in-feed machining with cup-type wheels in ELID grinding. But the diameter of the workpiece is limited with the diameter of the grinding wheel in the in-feed machining method. In this study, some finding experiments by the rotary surface grinding machine with straight type wheels were conducted, by which the possible grinding area of the workpiece is independent of the diameter of the wheels. For the purpose of investigating the grinding characteristics of large scale diametrical silicon wafer, grinding conditions such as rotation speed of grinding wheels and revolution of workpieces are varied, and grinding machine used in this experiment is rotary type surface grinding m/c equipment with an ELID unit. The surface ground using the SD8000 wheels showed that mirror like surface roughness can be attained near 2~6 nm in Ra.