• Journal of the Korean Society for Nondestructive Testing
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• v.32 no.2
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• pp.142-148
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• 2012

This study presents the assessment results of adhesive properties on the interface between a silicon wafer and nano-scale polymer thin film pattern through UAFM images by using the contact resonance frequency of the cantilever. For the experiment, we varied surface treatment processes for the silicon wafer and fabricated a 300nm polymer thin film pattern through lithography. Images from the optical microscope were used to compare the produced test specimens for adhesive condition and the critical load value from the nano scratch test was used to verify the adhesive condition of the nano pattern. Each test specimen resulted in a $1{\mu}m{\times}1{\mu}m$ surface image and subsurface adhesive image. Adhesive condition was evaluated by image contrast differences on the interface according to the changing amplitudes and phases of contact resonance frequency.

• KSTLE International Journal
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• v.6 no.1
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• pp.13-16
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• 2005

Friction characteristics at nano-scale of self-assembled monolayers (SAMs) having different chain lengths and end groups were experimentally studied.51 order to understand the effect of the chain length and end group on the nano-scalefriction: (1) two different SAMs of shorter chain lengths with different end groups such as methyl and phenyl groups, and (2)four different kinds of SAMs having long chain lengths (C10) with end groups of fluorine and hydrogen were coated on siliconwafer (100) by dipping method and Chemical Vapour Deposition (CVD) technique. Their nano-scale friction was measuredusing an Atomic Force Microscopy (AFM) in the range of 0-40 nN normal loads. Measurements were conducted at the scanning speed of 2 $mu$m/s for the scan size of 1$mu$m x 1 $mu$m using a contact mode type $Si_3N_4$ tip (NPS 20) that had a nominal spring constant0.58 N/m. All experiments were conducted at anlbient temperature (24 $pm$1$circ$C) and relative humidity (45 $pm$ 5%). Results showedthat the friction force increased with applied normal load for all samples, and that the silicon wafer exhibited highest frictionwhen compared to SAMs. While friction was affected by the inherent adhesion in silicon wafer, it was influenced by the chainlength and end group in the SAMs. It was observed that the nano-friction decreased with the chain length in SAMs. In the caseof monolayers with shorter length, the one with the phenyl group exhibited higher friction owing to the presence of benBenerings that are stiffer in nature. In the case of SAMs with longer chain length, those with fluorine showed friction values relativelyhigher than those of hydrogen. The increase in friction due to the presence of fluorine group has been discussed with respect tothe siBe of the fluorine atom.

• Membrane Journal
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• v.9 no.3
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• pp.185-192
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• 1999

The ultrafiltration characteristics of wafer processing wastewater produced from semicon¬ductor industry was investigated for wastewater reuse. Using the pilot-scale ultrafiltration system con¬taining poly sulfone hollow fiber membranes (MWCO : 10,000, 20,000, 30,(00), the membrane performance, such as flux, rejection rate and concentration factor for flux was examined. The SDhs, turbidity, electrical conductivity and concentration of Si particles were measured, and the possibility of permeate reuse was validated from the experimental results. It was shown that the flux was recovered by the sweeping with air and water effectively. The permeate flux of 30,000 MWCO membrane was about 5 times higher than that of 10,000 and 20,000 MWCO membranes. The concentration of Si particle in the saw wastewater was analyzed 3.8-5.6 mg/$\ell$ and that of Si particle in the permeate was analyzed less than 0.2${\mu}g$/$\ell$. This means the rejection of silicon particle was over 96%.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.05a
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• pp.1051-1054
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• 2000

We developed the micro CSF (celebrospinal fluid) shunt valve with surface and bulk micromachining technology in polymer MEMS. This micro CSF shunt valve was formed with four micro check valves to have a membrane connected to the anchor with the four bridges. The up-down movement of the membrane made the CSF on & off and the valve characteristic such as open pressure was controlled by the thickness and shape of the bridge and the membrane. The membrane, anchor and bridge layer were made of the $O_2$ RIE (reactive ion etching) patterned Parylene thin film to be about 5~10 microns in thickness on the silicon wafer. The dimension of the rectangular nozzle is 0.2＊0.2 $\textrm{mm}^2$ and the membrane 0.45 mm in diameter. The bridge width is designed variously from 0.04 mm to 0.12 mm to control the valve characteristics. To protect the membrane and bridge in the CSF flow, we developed the packaging system for the CSF micro shunt valve with the deep RIE of the silicon wafer. Using this package, we can control the gap size between the membrane and the nozzle, and protect the bridge not to be broken in the flow. The total dimension of the assembled system is 2.5＊2.5 $\textrm{mm}^2$ in square, 0.8 mm in height. We could precisely control the burst pressure and low rate of the valve varing the design parameters, and develop the whole CSF shunt system using this polymer MEMS fabricated CSF shunt valve.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.2
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• pp.68-73
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• 2006

We propose a damascene gate FinFET with Si nanocrystals implemented on bulk silicon wafer for low voltage flash memory device. The use of optimized SRON (Silicon-Rich Oxynitride) process allows a high degree of control of the Si excess in the oxide. The FinFET with Si nanocrystals shows high program/erase (P/E) speed, large $V_{TH}$ shifts over 2.5V at 12V/$10{\mu}s$ for program and -12V/1ms for erase, good retention time, and acceptable endurance characteristics. Si nanocrystal memory with damascene gate FinFET is a solution of gate stack and voltage scaling for future generations of flash memory device. Index Terms-FinFET, Si-nanocrystal, SRON(Si-Rich Oxynitride), flash memory device.

• Korean Chemical Engineering Research
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• v.47 no.1
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• pp.1-10
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• 2009

As a demand for the portable device requiring smaller size and better performance is in hike, reducing the size of conventionally used planar 2 dimensional chip cannot be a solution for the enhancement of the semiconductor chip technology due to an increase in RC delay among interconnects. To address this problem, a new technology - "3 dimensional (3D) IC chip stack" - has been emerging. For the integration of the technology, several new key unit processes (e.g., silicon through via, wafer thinning and wafer alignment and bonding) should be developed and much effort is being made to achieve the goal. As a result of such efforts, 4 and 8 chip-stacked DRAM and NAND structures and a system stacking CPU and memory chips vertically were successfully developed. In this article, basic theory, configurations and key unit processes for the 3D IC chip integration, and a current tendency of the technology are explained. Future opportunities and directions are also discussed.

• Korean Chemical Engineering Research
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• v.53 no.3
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• pp.401-406
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• 2015

Getter is a class of materials used in absorbing gases such as hydrogen and moisture in microelectronics or semiconductor devices to operate properly. In this study, we developed a new device structure consisting of porous anodized alumina films on textured silicon wafer, which have cost efficiency in materials and processing aspects. Anodic aluminum oxide (AAO) with controlled pore sizes can be applied to a high-efficiency moisture absorber due to the high surface area and OH- saturated surface property. The moisture sorption capacity was 2.02% (RH=35%), obtained by analyzing isothermal adsorption/desorption curve.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.3
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• pp.245-248
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• 2020

The wettability of silicon carbide (SiC) crystal, which has 6H-SiC and 4H-SiC regions prepared using the physical vapor transport (PVT) method, is quantitatively analyzed using dispensed deionized (DI) water droplets. Regardless of the polytypes in SiC, the average of five contact angle measurements showed a difference of about 6° between the Si-face and C-face. The contact angle on the Si-face (C-face) is measured after the removal of the native oxide using BOE (6:1), and revealed a significant decrease of the contact angle from 74.9° (68.4°) to 47.7° (49.3°) and from 75.8° (70.2°) to 51.6° (49.5°) for the 4H-SiC and 6H-SiC regions, respectively. The contact angle of the Si-face recovered over time during room temperature oxidation in air; in contrast, that of the C-face did not recover to the initial value. This study shows that the contact angle is very sensitive to SiC surface polarity, specific surface conditions, and process time. Contact angle measurements are expected to be a rapid way of determining the surface polarity and wettability of SiC crystals.

• KSTLE International Journal
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• v.6 no.2
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• pp.33-38
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• 2005

Submicron-scale patterns made of polymethyl methacrylate (PMMA) were fabricated on silicon-wafer using a capillarity-directed soft lithographic technique. Polyurethane acrylate (PUA) stamps (Master molds) were used to fabricate the patterns. Patterns with three different aspect ratios were fabricated by varying the holding time. The patterns fabricated were the negative replica of the master mold. The patterns so obtained were investigated for their adhesion and friction properties at nano-scale using AFM. Friction tests were conducted in the range of 0-80 nN. Glass (Borosilicate) balls of diameter 1.25 mm mounted on cantilever (Contact Mode type NPS) were used as tips. Further, micro-friction tests were performed using a ball-on-flat type micro-tribe tester, under reciprocating motion, using a soda lime ball (1 mm diameter) under a normal load of 3,000 mN. All experiments were conducted at ambient temperature ($24{\pm}1^{\circ}C$) and relative humidity ($45{\pm}5\%$). Results showed that the patterned samples exhibited superior tribological properties when compared to the silicon wafer and non-patterned sample (PMMA thin film) both at the nano and micro-scales, owing to their increased hydrophobicity and reduced real area of contact. In the case of patterns it was observed that their morphology (shape factor and size factor) was decisive in defining the real area of contact.

• Korean Journal of Materials Research
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• v.9 no.12
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• pp.1176-1180
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• 1999

The adhesion strength and high temperature/high humidity reliability of polyetherimide (PEI) adhesive on silicon wafer after being treated by each reactive ion etching (RIE) Aluminum (Al)-chelate adhesion promoter were investigated. 180$^{\circ}$ peel test and <85$^{\circ}C$ 85%> humidity test were performed for the initial adhesion strength and high temperature/high humidity reliability, respectively. For investigating surface effect scanning electron microscope (SEM), atomic force microscope (AFM), deionized (DI)-water contact angle studies were carried out. To investigate RIE effect, PEI was treated with $^O_2$ RIE, and then laminated. The initial peel strength increased slightly from 1.6 kg/cm for the first 2 minutes, and then decreased. High temp/high humid resistance decreased rapidly by RIE etching. RIE treatment on PEI affected on both of roughness and hydrophilicity increase. Aluminum-chelate adhesion promoter was coated by spinning on silicon wafer. The initial peel strength showed no effect of adhesion promoter treatment, but high temp/high humidity resistance increased remarkably. Al-chelate adhesion promoter did not affect the roughness but increased hydrophilicity.