• Current Photovoltaic Research
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• 제6권4호
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• pp.94-101
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• 2018

Light elevated temperature induced degradation (LeTID) was noted as an issue in multi-crystalline silicon solar cells (MSSC) by Ram speck in 2012. In contrast to light induced degradation (LID), which has been researched in silicon solar cells for a long time, research about both LeTID and the mechanism of LeTID has been limited. In addition, research about LeTID in single-crystalline silicon solar cells (SSSC) is even more limited. In order to improve understanding of LeTID in SSSC with a passivated emitter rear contact (PERC) structure, we fabricated four group samples with boron and oxygen factors and evaluated the solar cell characteristics, such as the cell efficiency, $V_{oc}$, $I_{sc}$, fill factor (FF), LID, and LeTID. The trends of LID of the four group samples were similar to the trend of LeTID as a function of boron and oxygen.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.677-680
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• 1999

Rapid developing automation technology enhances the need of sensors. Among many materials, silicon has the advantages of electrical and mechanical property, Single-crystalline silicon has different piezoresistivity on 야fferent directions and a current leakage at elevated temperature, but poly-crystalline silicon has the possibility of controling resistivity using dopping ions, and operation at high temperature, which is grown on insulating layers. Each wafer has slightly different thicknesses that make difficult to obtain the precisely same thickness of a diaphragm. This paper deals with the fabrication process to make poly-crystalline silicon based pressure sensors which includes diaphragm thickness and wet-etching techniques for each layer. Diaphragms of the same thickness can be fabricated consisting of deposited layers by silicon bulk etching. HF etches silicon nitride, HNO$_3$+HF does poly -crystalline silicon at room temperature very fast. Whereas ethylenediamice based etchant is used to etch silicon at 11$0^{\circ}C$ slowly.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.234-234
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• 2010

Most high efficiency silicon solar cells use a passivated selective emitter. It have been an important research subject for crystalline silicon solar cells for decades. It is being used in production for high efficiency solar cells. Most of the selective emitter process require expensive extra masking, etching steps, and a double diffusion process making selective emitters not cost effective. In this paper, we study method for single diffusion step selective emitter process as an alternative to not cost effective double diffusion process. Cost effective selective emitter that the efficiency should be increased significantly (mare than 0.2%) and that the process should simple, robust and cheap.

• 한국태양에너지학회:학술대회논문집
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• 한국태양에너지학회 2011년도 추계학술발표대회 논문집
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• pp.245-248
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• 2011

Many researches have been carried out to improve light absorption in the crystalline silicon solar cell fabrication. The rear reflection is applied to increase the path length of light, resulting in the light absorption enhancement and thus the efficiency improvement mainly due to increase in short circuit current. In this paper, we manufactured the silicon solar cell using the mono crystalline silicon wafers with $156{\times}156mm^2$, 0.5~3.0 ${\Omega}{\cdot}cm$ of resistivity and p-type. After saw damage removal, the dielectric film ($SiN_x$)on the back surface was deposited, followed by surface texturing in the KOH solution. It resulted in single-side texturing wafer. Then the dielectric film was removed in the HF solution. The silicon wafers were doped with phosphorus by $POCl_3$ with the sheet resistance 50 ${\Omega}/{\Box}$ and then the silicon nitride was deposited on the front surface by the PECVD with 80nm thickness. The electrodes were formed by screen-printing with Ag and Al paste for front and back surface, respectively. The reflectance and transmittance for the single-sided and double-sided textured wafers were compared. The double-sided textured wafer showed higher reflectance and lower transmittance at the long wavelength region, compared to single-sided. The completed crystalline silicon solar cells with different back surface texture showed the conversion efficiency of 17.4% for the single sided and 17.3% for the double sided. The efficiency improvement with single-sided textured solar cell resulted from reflectance increase on back surface and light absorption enhancement.

• Journal of Electrical Engineering and Technology
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• 제2권2호
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• pp.274-279
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• 2007

This study focuses on the enhancement of maskless photolithography as well as the peptide synthesis application with single crystalline silicon micromirrors. A single crystalline silicon micromirror array has been designed and fabricated in order to improve its application to the peptide synthesis. A micromirror rotates about ${\pm}\;9^{\circ}$ at the pull-in voltage, which can range from 90.7 V to 115.1 V. A $210\;{\mu}m-by-210\;{\mu}m$ micromirror device with $270\;{\mu}m$ mirror pitch meets the requirements of an adequately precise separation for peptide synthesis. Synthetic 16 by 16 peptide array corresponds to the same number of micromirrors. The large size of peptide pattern and the separation facilitate biochip experiments using fluorescence assay. The peptide pattern has been synthesized on the GPTS-PEG200 surface with BSA-blocking and thereupon the background was acetylated to reject non-specific bindings. Hence, an averaged slope at the pattern edge has been distinguishably improved in comparison to patterning results from an aluminum micromirror.

• 전기학회논문지
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• 제60권2호
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• pp.362-369
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• 2011

In this paper, optimal deep reactive ion etching (DRIE) process conditions for fused quartz were experimentally determined by Taguchi method, and fused quartz-based micro cantilevers were fabricated. In addition, comparative study on Q-factors of fused quartz and silicon micro cantilevers was performed. Using a silicon layer as an etch mask for fused quartz DRIE process, different 9 flow rate conditions of $C_4F_8$, $O_2$ and He gases were tested and the optimum combination of these factors was estimated. Micro cantilevers based on fused quartz were fabricated from this optimal DRIE condition. Through conventional silicon DRIE process, single-crystalline silicon micro cantilevers whose dimensions were similar to those of quartz cantilevers were also fabricated. Mechanical Q-factors were calculated to compare intrinsic damping properties of those two materials. Resonant frequencies and Q-factors were measured for the cantilevers having fixed widths and thicknesses and different lengths. The Q-factors were in a range of 64,000 - 108,000 for fused quartz cantilevers and 31,000 - 35,000 for silicon cantilevers. The experimental results supported that fused quartz had a good intrinsic damping property compared to that of single crystalline silicon.

• 한국결정성장학회지
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• 제24권2호
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• pp.47-53
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• 2014

태양전지용 규소에는 단결정, 다결정, mono-like의 세 가지 재료가 사용 중에 있다. 첫 번째로, 단결정은 수율향상의 과제에 집중되고 있으며, 이것은 고액 계면의 형상이 주요 요인으로 알려지고 있다. 이에 대한 연구가 전산모사 등으로 집중되고 있다. 또한 결정과 도가니의 회전 속도가 고액 계면의 형상에 영향을 미치는 것이 확인 되었다. 다결정의 경우에는 결정립계의 역할이 매우 중요하므로 이에 대한 연구가 진행되는데, 이들을 특히 전기적으로 비활성적인 쌍정 입계로 전환하는 연구가 진행되고 있다. 성장 조건을 변경시켜 쌍정 입계로 바꾸어서 재료의 전기적 성질을 향상시키는 결과를 확인하였다. 또한 성장 공정에서 발생될 수 있는 오염을 줄이기 위한 노력은 상부의 Ar 가스의 흐름을 상향 조절하여 불순물의 용입을 줄임이 확인되었다. 다음으로 mono-like인 경우에는 측면으로부터 성장 되어 들어오는 다결정이 단결정의 분율을 저하 시키는 주요 요인이 되고 있다. 이에 대한 해결책으로 하부의 냉각 속도를 높이고 상부와 측면에 단열재를 보강하는 방안이 제시되고 있고, 하부에 놓는 seed의 orientation을 조절하여 측면으로부터 성장 되어 들어오는 다결정을 억제하는 방안이 효과가 있음이 확인 되고 있다.

• 한국결정성장학회지
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• 제26권5호
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• pp.171-174
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• 2016

The diamond wire sawing method to produce silicon wafers for the photovoltaic application is still a new and highly investigated wafering technology. This technology, featured as the higher productivity, lower wear of the wire, and easier recycling of the coolant, is expected to become the mainstream technique for slicing the silicon crystals. However, the saw marks on the wafer surface have to be investigated and improved. This paper discusses the removal of saw marks on diamond wire-sawn single crystalline silicon wafer. With a pretreatment step using tetramethyl ammonium hydroxide ($(CH_3)_4NOH$, TMAH) and conventional texturing process with KOH solution (1 % KOH, 8 % IPA, and DI water), the saw marks on the surface of the diamond wire-sawn silicon wafers can be effectively removed and they are invisible to naked eyes completely.

• Current Photovoltaic Research
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• 제6권1호
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• pp.1-11
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• 2018

Current major photovoltaic (PV) market share (> 60%) is being occupied by the multicrystalline (mc)-silicon solar cells despite of low efficiency compared to single crystalline silicon solar cells. The diamond wire sawing technology reduces the production cost of crystalline silicon solar cells, it increases the optical loss for the existing mc-silicon solar cells and hence its efficiency is low in the current mass production line. To overcome the optical loss in the mc-crystalline silicon, caused by the diamond wire sawing, next generation texturing process is being investigated by various research groups for the PV industry. In this review, the limitation of surface structure and optical loss due to the reflectivity of conventional mc-silicon solar cells are explained by the typical texturing mechanism. Various texturing technologies that could minimize the optical loss of mc-silicon solar cells are explained. Finally, next generation texturing technology to survive in the fierce cost competition of photovoltaic market is discussed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
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• pp.342-344
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• 1995

Using piezoresistive effects of single-crystal and poly-crystalline silicon, pressure sensors of the same pattern were fabricated for comparison of temperature characteristics. Optimum size and aspect ratio of rectangular sensor diaphragm were calculated by FEM. For polsilicon pressure sensor, polysilicon resistors of Wheatstone bridge were deposited by LPCVD to be used in a wide' temperature range. Polysilicon pressure sensors showed more stable temperature characteristics than single-crysta1 silicon in the range of $-20\sim125[^{\circ}C]$. To get low TCO (Temperature Coefficient of Offset), below $\pm$3 [${\mu}V/V/^{\circ}C$], it is needed for each TCR of piezoresistors to have a deviation within $\pm25[ppm/^{\circ}C]$ less than $\pm500[ppm/^{\circ}C]$ of resistors for polysilicon pressure sensor can result in low TCS(Temperature Coefficient of Sensitivity) of -0.1[%FS/$^{\circ}C$].