• Title/Summary/Keyword: Squarer

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Area-Efficient Squarer and Fixed-Width Squarer Design (저면적 제곱기 및 고정길이 제곱기의 설계)

  • Cho, Kyung-Ju
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.3
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    • pp.42-47
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    • 2011
  • The partial product matrix (PPM) of a parallel squarer is symmetric. To reduce the depth of PPM, it can be folded, shifted and rearranged. In this paper, we present an area-efficient squarer design method using new partial product rearrangement. Also, a fixed-width squarer design method of the proposed squarer is presented. By simulations, it is shown that the proposed squarers lead to up to 17% reduction in area, 10% reduction in propagation delay and 10% reduction in power consumption compared with previous squarers. By using the proposed fixed-width squarers, the area, propagation delay and power consumption can be further reduced up to 30%, 16% and 28%, respectively.

Design of combined unsigned and signed parallel squarer (Unsigned와 signed 겸용 병렬 제곱기의 설계)

  • Cho, Kyung-Ju
    • Smart Media Journal
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    • v.3 no.1
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    • pp.39-45
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    • 2014
  • The partial product matrix of a parallel squarer are symmetric about the diagonal. To reduce the number of partial product bits and the depth of partial product matrix, it can be typically folded, shifted and bit-rearranged. In this paper, an efficient design approach for the combined squarer, capable of operating on either unsigned or signed numbers based on a mode selection signal, is presented. By simulations, it is shown that the proposed combined squarers lead to up to 18% reduction in area, 11% reduction in propagation delay and 9% reduction in power consumption compared with the previous combined squarers.

Voltage-Mode CMOS Squarer/Multiplier Circuit

  • Bonchu, B.;Surakampontorn, W.
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.646-649
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    • 2002
  • In this paper, a low-voltage CMOS squarer and a four-quadrant analog multiplier are presented. It is based on a source-coupled pair and a scaled-floating voltage generator which are modified to work as a voltage squaring and a sum/difference circuits. The proposed squarer/multiplier have been simulated with HSPICE, where -3㏈ bandwidth of 10MHz is achieved. The power consumption is about 0.6㎽, from a ${\pm}$1.5V supply, and the total harmonic distortion is less than 0.7%, with a 1.2V peak-to-peak 1MHz input signal.

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Fixed-Width Booth-folding Squarer Design (고정길이 Booth-Folding 제곱기 디자인)

  • Cho Kyung-Ju;Chung Jin-Gyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.8C
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    • pp.832-837
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    • 2005
  • This paper presents a design method for fixed-width squarer that receives a W-bit input and produces a W-bit squared product. To efficiently compensate for the quantization error, modified Booth encoder signals (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups (major/minor group) depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulations, it is shown that the performance of the proposed method is close to that of the rounding method and much better than that of the truncation method and conventional method. It is also shown that the proposed method leads to up to $28\%\;and\;27\%$ reduction in area and power consumption compared with the ideal squarers, respectively.

Design of LFSR Multipliers for Public-key Cryptosystem (공개키 암호 시스템을 위한 LFSR 곱셈기 설계)

  • 이진호;김현성
    • Journal of Korea Society of Industrial Information Systems
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    • v.9 no.1
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    • pp.43-48
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    • 2004
  • This paper presents new architectures based on the linear feedback shia resister architecture over GF(2m). First we design a modular multiplier and a modular squarer, then propose an architecture by combing the multiplier and the squarer. All architectures use an irreducible AOP (All One Polynomial) as a modulus, which has the properties of all coefficients with '1'. The proposed architectures have lower hardware complexity than previous architectures. They could be. Therefore it is useful for implementing the exponentiation architecture, which is the con operation in public-key cryptosystems.

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Experimental of Study on Heat Transfer and Pressure drop of PF Heat Exchangers (PF 열교환기의 열전달과 압력강하 특성 실험 연구)

  • Um, Y.S.;Seo, D.N.;Park, K.M.;Lee, S.J.;Kim, D.H.;Kwon, Y.C.
    • Proceedings of the SAREK Conference
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    • 2008.11a
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    • pp.519-524
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    • 2008
  • In the present study, the air-side heat transfer and pressure drop characteristics of the fin-tube and PF heat exchangers have been experimentally investigated under the cooling standard condition. Fin type of PF heat exchanger is a triangler and squarer form. The experimental data of the slit fin-tube and two kinds of PF heat exchangers are measured using the air-enthalpy calorimeter and the constant temperature water bath. As the inlet air velocity increases, the heat transfer rate and pressure drop of the heat exchanger increased. The heat transfer rate and pressure drop of PF-2 heat exchanger of the squarer fin is larger than that of PF-1 heat exchanger of the triangler fin. As the inlet air temperature increases, the heat transfer rate decreases and the pressure drop is nearly uniform.

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Experimental Study on Performance of Air-conditioner with PF Heat Exchanger (PF 열교환기를 적용한 공조기의 성능에 대한 실험연구)

  • Seo, D.N.;Um, Y.S.;Park, K.M.;Lee, S.J.;Kim, D.H.;Kwon, Y.C.
    • Proceedings of the SAREK Conference
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    • 2008.11a
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    • pp.525-530
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    • 2008
  • In the present study, the cooling performances of the air-conditioner applied the fin-tube and aluminum PF heat exchangers have been experimentally investigated by using the calorimeter. The experiment is carried out in the conditions of the standard temperature and the low temperature. Fin type of PF heat exchanger is a triangler and squarer form. PF heat exchanger has smaller refrigerant weight and larger capacity and COP han the fin-tube heat exchanger. The performance of PF-2 heat exchanger with the squarer in is more excellent than that of PF-1 heat exchanger with the triangler fin. The high pressure of PF heat exchanger decreases about 7%, compared to the fin-tube heat exchanger. Also, CSPF of the fin-tube and PF heat exchanger is evaluated.

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Experimental Study on Cooling Performance of A/C applied Fin-tube and PF Heat Exchangers (핀-관, 평행류 열교환기를 적용한 공조기의 냉방성능 실험연구)

  • Kwon, Young-Chul;Park, Yoon-Chang;Kwon, Jeong-Tae;Park, Gyung-Man
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.8
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    • pp.1789-1794
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    • 2009
  • In the present study, the cooling performance characteristics on environment changes of A/C applied fin-tube and PF heat exchangers were experimentally investigated. Capacity and COP on an air velocity, an indoor/outdoor temperature and an indoor/outdoor relative humidity were obtained. Fin types of PF heat exchanger were a triangler and squarer form. The experimental data for the three kinds of heat exchangers were measured using the air-enthalpy calorimeter. Performance of PF A/C was more excellent than that of a fin-tube A/C. Also, the performance of PF-2 A/C with the squarer fin was more excellent than that of PF-1 A/C with the triangler fin. As the air velocity, the indoor temperature and the indoor relative humidity increase, capacity and COP increase. And as outdoor temperature increases, capacity and COP decrease. But, the performance change on the outdoor relative humidity was insignificant.

Performance Characteristics on Environment Change of A/C applied Fin-tube and PF Heat Exchangers (환경변화에 따른 핀-관, PF 열교환기 적용 공조기 성능 특성 실험 연구)

  • Park, K.M.;Um, U.S.;Kwon, Y.C.;Lee, S.J.
    • Proceedings of the SAREK Conference
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    • 2009.06a
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    • pp.1267-1271
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    • 2009
  • In the present study, performance characteristics on environment change of A/C applied fin-tube and PF heat exchangers were experimentally investigated. Capacity and COP changing an outlet air velocity, an indoor/outdoor temperature and a relative humidity were obtained. Air-enthalpy calorimeter was used. As the air velocity, indoor temperature and relative humidity increase, capacity and COP increase. PF A/C has smaller refrigerant weight than the fin-tube A/C. The performance of PF-2 A/C with the squarer fin was more excellent than that of PF-1 A/C with the triangler fin.

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Design of Systolic Multiplier/Squarer over Finite Field GF($2^m$) (유한 필드 GF($2^m$)상의 시스톨릭 곱셈기/제곱기 설계)

  • Yu, Gi-Yeong;Kim, Jeong-Jun
    • Journal of KIISE:Computer Systems and Theory
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    • v.28 no.6
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    • pp.289-300
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    • 2001
  • 본 논문에서는 유한 필드 GF(2$_{m}$ ) 상에서 모듈러 곱셈 A($\chi$)B($\chi$) mod P($\chi$)을 수행하는 새로운 선형 문제-크기(full-size) 시스톨릭 어레이 구조인 LSB-first 곱셈기를 제안한다. 피연산자 B($\chi$)의 LSB(least significant bit)를 먼저 사용하는 LSB-first 모듈러 곱셈 알고리즘으로부터 새로운 비트별 순환 방정식을 구한다. 데이터의 흐름이 규칙적인 순환 방정식을 공간-시간 변환으로 새로운 시스톨릭 곱셈기를 설계하고 분석한다. 기존의 곱셈기와 비교할 때 제안한 곱셈기의 면적-시간 성능이 각각 10%와 18% 향상됨을 보여준다. 또한 같은 설계방법으로 곱셈과 제곱연산을 동시에 수행하는 새로운 시스톨릭 곱셈/제곱기를 제안한다. 유한 필드상의 지수연산을 위해서 제안한 시스톨릭 곱셈/제곱기를 사용할 때 곱셈기만을 사용 할 때보다 면적-시간 성능이 약 26% 향상됨을 보여준다.

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