• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.5
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• pp.437-442
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• 2002

This paper presents a current-source-inverter based on a buck-boost configuration md its application for residential photovoltaic system. The proposed circuit has five switches. Among them, only one switch acts as chopping, and the other determine the polarity of output; therefore, it can reduce the switching loss. Because the input inductor current is operated on the discontinuous conduction mode, high power factor can be achieved without additional input current controller. So the overall system shows a simple structure. The operational modes are analysed in depth, and then it was verified through the experimental results using a 150[W] prototype equipped with digital signal processor TMS320F241.

• Proceedings of the KIPE Conference
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• 2008.10a
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• pp.130-132
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• 2008

In this paper, we have proposed a novel zero-voltage-switching (ZVS) soft-switching H-bridge inverter. Because the conventional H-Bridge inverter generates switching losses at turn on and off, the efficiency is reduced. The proposed inverter operates ZVS switching using an auxiliary switch and resonant circuit to improve the efficiency. in the DC-DC converter stage, it can reduce not only switching loss but also capacity and size of passive devices due to the resonant elements. DC-AC inverter stage supplies load with energy through the ZVS operation of 4 switches. A detail mode analysis of operating is in presented. We have presented the inverter topology, principle of operation and simulation results obtained from the PSIM simulator.

• Journal of Sensor Science and Technology
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• v.23 no.5
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• pp.332-336
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• 2014

In this paper, we propose a complementary metal oxide semiconductor (CMOS) binary image sensor with a gate/body-tied (GBT) PMOSFET-type photodetector for high-speed operation. The GBT photodetector of an active pixel sensor (APS) consists of a floating gate ($n^+$-polysilicon) tied to the body (n-well) of the PMOSFET. The p-n junction photodiode that is used in a conventional APS has a good dynamic range but low photosensitivity. On the other hand, a high-gain GBT photodetector has a high level of photosensitivity but a narrow dynamic range. In addition, the pixel size of the GBT photodetector APS is less than that of the conventional photodiode APS because of its use of a PMOSFET-type photodetector, enabling increased image resolution. A CMOS binary image sensor can be designed with simple circuits, as a complex analog to digital converter (ADC) is not required for binary processing. Because of this feature, the binary image sensor has low power consumption and high speed, with the ability to switch back and forth between a binary mode and an analog mode. The proposed CMOS binary image sensor was simulated and designed using a standard CMOS $0.18{\mu}m$ process.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.6
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• pp.699-706
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• 2015

A previous adapter have a single-ouput, however, a demand of a multi-output adapter increase in the recent industrial site. In order to satisfy the demand, in this research, we implement a programmable high efficiency multi-output adapter. The basic structure of the adapter introduced in this paper is a sort of flyback. The way for producing the reference voltage of the adapter proposed is similar to the way in the general flyback implemented with TL431. In addition to the basic concept of the design, however, we introduce a digital variable resistor, AD5246BKSZ10-RL7 and a microcontroller for changing a programmable multi-output. It makes output be variable that the digital variable resistor change the reference voltage of the adapter by order of the microcontroller. The adapter output voltage is controllable in the range of 20V by the user, and the power efficiency is proven to be 85%.

• Journal of Power Electronics
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• v.15 no.1
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• pp.146-159
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• 2015

Since the power capacity needed for the propulsion of large ships is very large, a multiphase AC induction propulsion mode is generally adopted to meet the higher requirements of reliability, redundancy and maintainability. This paper gives a detailed description of the development of a 20MW fifteen-phase PWM driver for advanced fifteen-phase propulsion induction motors with a special third-harmonic injection in terms of the main circuit hardware, control system design, experiments, etc. The adoption of the modular design method for the main circuit hardware design can make the enclosed mechanical structure simple and maintainable. It can also avoid the larger switch stresses caused by the multiple turn on of the IGBTs in conventional large-capacity converter systems. The use of the distributed controller design method based on a high-speed fiber-optic ring net for the control system can overcome such disadvantages as the poor reliability and long maintenance times arising from the conventional centralized controller which is designed according to point-to-point communication. Finally, the performance of the 20MW PWM driver is verified by experimentation on a new fifteen-phase induction propulsion motor.

• Journal of Power Electronics
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• v.14 no.3
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• pp.444-457
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• 2014

This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.16 no.6
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• pp.454-464
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• 2023

This paper proposes a low-power 8-bit asynchronous SAR ADC with a sampling rate of 1 MS/s for sensor node applications. The ADC uses bootstrapped switches to improve linearity and applies a VCM-based CDAC switching technique to reduce the power consumption and area of the DAC. Conventional synchronous SAR ADCs that operate in synchronization with an external clock suffer from high power consumption due to the use of a clock faster than the sampling rate, which can be overcome by using an asynchronous SAR ADC structure that handles internal comparisons in an asynchronous manner. In addition, the SAR logic is designed using dynamic logic circuits to reduce the large digital power consumption that occurs in low resolution ADC designs. The proposed ADC was simulated in a 180-nm CMOS process, and at a 1.8 V supply voltage and a sampling rate of 1 MS/s, it consumed 46.06 𝜇W of power, achieved an SNDR of 49.76 dB and an ENOB of 7.9738 bits, and obtained a FoM of 183.2 fJ/conv-step. The simulated DNL and INL are +0.186/-0.157 LSB and +0.111/-0.169 LSB.

• Korean Journal of Optics and Photonics
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• v.13 no.2
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• pp.146-150
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• 2002

1.55${\mu}{\textrm}{m}$ PnpN optical thyristor as a smart optical switch has potential applications in advanced optical communication systems. PnpP optical thyristors operating at 1.55${\mu}{\textrm}{m}$ are proposed and fabricated for the first time. In the optical thyristors, we employ InGaAs/InP multiple quantum well (MQW) for the active n- and p-layers. The thyristors show sufficiently nonlinear s-shape I-V characteristics and spontaneous emission. In the OFF-state, the device has a high-impedance up to switching voltage of 4.03(V). On the other hand, it has low-impedance and emits spontaneous light as a light-emitting diode in the ON-state voltage of 1.77(V), and switching voltage is changed under several light input conditions. It can be used as a header processor in optical asynchronous transfer mode (ATM), as a hard limiter in optical code division multiple access (CDMA) and as a wavelength converter in optical WDM systems.