• Title/Summary/Keyword: Tradeoffs

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Development of a Heuristic Algorithm Based on Simulated Annealing for Time-Resource Tradeoffs in Project Scheduling Problems (시간-자원 트레이드오프 프로젝트 스케줄링 문제 해결을 위한 시뮬레이티드 어닐링 기반 휴리스틱 알고리즘 개발)

  • Kim, Geon-A;Seo, Yoon-Ho
    • The Journal of Information Systems
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    • v.28 no.4
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    • pp.175-197
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    • 2019
  • Purpose This study develops a heuristic algorithm to solve the time-resource tradeoffs in project scheduling problems with a real basis. Design/methodology/approach Resource constrained project scheduling problem with time-resource tradeoff is well-known as one of the NP-hard problems. Previous researchers have proposed heuristic that minimize Makespan of project scheduling by deriving optimal combinations from finite combinations of time and resource. We studied to solve project scheduling problems by deriving optimal values from infinite combinations. Findings We developed heuristic algorithm named Push Algorithm that derives optimal combinations from infinite combinations of time and resources. Developed heuristic algorithm based on simulated annealing shows better improved results than genetic algorithm and further research suggestion was discussed as a project scheduling problem with multiple resources of real numbers.

The Montgomery Multiplier Using Scalable Carry Save Adder (분할형 CSA를 이용한 Montgomery 곱셈기)

  • 하재철;문상재
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.10 no.3
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    • pp.77-83
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    • 2000
  • This paper presents a new modular multiplier for Montgomery multiplication using iterative small carry save adder. The proposed multiplier is more flexible and suitable for long bit multiplication due to its scalable property according to design area and required computing time. We describe the word-based Montgomery algorithm and design architecture of the multiplier. Our analysis and simulation show that the proposed multiplier provides area/time tradeoffs in limited design area such as IC cards.

Surpassing Tradeoffs by Separation: Examples in Transmission Line Resonators, Phase-Locked Loops, and Analog-to-Digital Converters

  • Sun, Nan;Andress, William F.;Woo, Kyoung-Ho;Ham, Don-Hee
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.3
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    • pp.210-220
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    • 2008
  • We review three examples (an on-chip transmission line resonator [1], a phase-locked loop [2], and an analog-to-digital converter [3]) of design tradeoffs which can in fact be circumvented; the key in each case is that the parameters that seem to trade off with each other are actually separated in time or space. This paper is an attempt to present these designs in such a way that this common approach can hopefully be applied to other circuits. We note reader that this paper is not a new contribution, but a review in which we highlight the common theme from our published works [1-3]. We published a similar paper [4], which, however, used only two examples from [1] and [2]. With the newly added content from [3] in the list of our examples, the present paper offers an expanded scope.

A Study on Optimization Model of Time-Cost Trade-off Analysisusing Particle Swarm Optimization (Particle Swarm Optimization을 이용한 공기-비용 절충관계 최적화 모델에 관한 연구)

  • Park, U-Yeol;An, Sung-Hoon
    • Journal of the Korea Institute of Building Construction
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    • v.8 no.6
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    • pp.91-98
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    • 2008
  • It is time-consuming and difficulty to solve the time-cost trade-off problems, as there are trade-offs between time and cost to complete the activities in construction projects and this problems do not have unique solutions. Typically, heuristic methods, mathematical models and GA models has been used to solve this problems. As heuristic methods and mathematical models are have weakness in solving the time-cost trade-off problems, GA based model has been studied widely in recent. This paper suggests the time-cost trade-off optimization algorithm using particle swarm optimization. The traditional particle swarm optimization model is modified to generate optimal tradeoffs among construction time and cost efficiently. An application example is analyzed to illustrate the use of the suggested algorithm and demonstrate its capabilities in generating optimal tradeoffs among construction time and cost. Future applications of the model are suggested in the conclusion.

Towards Achieving the Maximum Capacity in Large Mobile Wireless Networks under Delay Constraints

  • Lin, Xiaojun;Shroff, Ness B.
    • Journal of Communications and Networks
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    • v.6 no.4
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    • pp.352-361
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    • 2004
  • In this paper, we study how to achieve the maximum capacity under delay constraints for large mobile wireless networks. We develop a systematic methodology for studying this problem in the asymptotic region when the number of nodes n in the network is large. We first identify a number of key parameters for a large class of scheduling schemes, and investigate the inherent tradeoffs among the capacity, the delay, and these scheduling parameters. Based on these inherent tradeoffs, we are able to compute the upper bound on the maximum per-node capacity of a large mobile wireless network under given delay constraints. Further, in the process of proving the upper bound, we are able to identify the optimal values of the key scheduling parameters. Knowing these optimal values, we can then develop scheduling schemes that achieve the upper bound up to some logarithmic factor, which suggests that our upper bound is fairly tight. We have applied this methodology to both the i.i.d. mobility model and the random way-point mobility model. In both cases, our methodology allows us to develop new scheduling schemes that can achieve larger capacity than previous proposals under the same delay constraints. In particular, for the i.i.d. mobility model, our scheme can achieve (n-1/3/log3/2 n) per-node capacity with constant delay. This demonstrates that, under the i.i.d. mobility model, mobility increases the capacity even with constant delays. Our methodology can also be extended to incorporate additional scheduling constraints.

Computational Speed Comparison between FFT Convolution and Recursive Filtering

  • Lee, Hyeong-Ho
    • Proceedings of the KIEE Conference
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    • 1979.08a
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    • pp.166-167
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    • 1979
  • Performances of three computational algorithms for one-dimensional frequency filtering are compared and tradeoffs are studied. If the size of the filter impulse response is small, it is well-known that the conventional convolution is superior than the FFT convolution. If the size of the impulse response is large, it was suggested that the recursive filter might be competitive in terms of speed to the FFT convolution. We, therefore, have developed an computational, algorithm for the recursive filter to compare the speed advantages over the FFT convolution and the results are presented.

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Performance Analysis of Fast Packet Switch

  • Lee, Kang-Won
    • Journal of Korean Institute of Industrial Engineers
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    • v.22 no.2
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    • pp.277-302
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    • 1996
  • The overall performance of BISDN depends significantly on the interconnection network or the switch fabric. Hence, it is extremely important to evaluate the performance of the network or the fabric. The well developed performance models also provide insight into the factors that determine design tradeoffs as well as quantitative estimates of their importance. The objective of this paper is to investigate and critically compare all the developed performance analysis models of FPS according to internal switch fabric structure, traffic assumptions, performance measures, methodologies, etc. FPSs are described according to their internal fabric structure. Brief history of FPS performance analysis is mentioned and performance analysis modeling is discussed.

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Flexible Register File with a Window Structure (유연한 창문 구조를 갖는 레지스터 파일)

  • Gi Hyun Jung
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.29B no.7
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    • pp.1-10
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    • 1992
  • This paper gives on overview of register windowing structure and presents advantages and limitations. Based on these advantages and disadvantages, an original approach for the design of large register file is presented, analyzed and compared with existing approaches. The advantages and disadvantages of this new approach to register file design are discussed, and conditions under which it works better than the existing approaches are outlined. Design tradeoffs are examined in an analytic and empirical study, and the results of which are summarized in the conclusion of this paper.

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A Model of Quality Function Deployment with Cost-Quality Tradeoffs (품질과 비용의 득실관계를 고려한 품질기능전개 모형)

  • 우태희;박재현
    • Proceedings of the Safety Management and Science Conference
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    • 2002.05a
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    • pp.227-230
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    • 2002
  • This paper presents an analytic method of quality function deployment(QFD) that is to maximize customer satisfaction subject to technical and economic sides in process design. We have used Wasserman's normalization method and the analytical hierarchy process(AHP) to determine the intensity of the relationship between customer requirements and process design attributes. This paper also shows cost-quality model the tradeoff between quality and cost as a linear programming(LP) with new constraints that have designated special process required allocating firstly The cost-quality function deployment of piston ring is presented to illustrate the feasibility of such techniques.

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