• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.69-78
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• 2007

A Frequency synthesizer for T-DMB and mobile-DTV applications was designed using $0.18{\mu}m$ CMOS process with 1.8V supply. PMOS transistors were chosen for VCO core to reduce phase noise. The VCO range is 920MHz-2100MHz using switchable inductors, capacitors and varactors. Varactor biases that improve varactor acitance characteristics were minimized as two, and $K_{VCO}$(VCO gain) value was aintained by switchable varactor. Additionally, VCO was designed that VCO gain and the interval of VCO gain were maintained using VCO gain compensation logic. VCO, PFD, CP and LF were verified by Cadence Spectre, and divider was simulated using Matlab Simulink, ModelSim and HSPICE. VCO consumes 10mW power, and is 56.3% tuning range. VCO phase noise is -127dBc/Hz at 1MHz offset for 1.58GHz output frequency. Total power consumption of the frequency synthesizer is 18mW, and lock time is about $140{\mu}s$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.4
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• pp.634-641
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• 2000

A switchable VCO for DECT handset is designed and fabricated. In dual mode radios, a single VCO is desired to operate at two different frequencies to meet the requirement of two mode(Tx, Rx). The three design types of switchable VCO are switched resonator VCO, switched mode VCO and dual band VCO. In this paper, we use the switched resonator VCO type using pin diode switch to change the total amount of capacitance in the tank circuit. At the bias condition of 3 V and 13mA, the output power and phase noise are better than6.5dBm and -104dBc/Hz at 25khz offset from the carrier, respectively , across the operating frequency range. From these results, the fabricated switched VCO is applicable to the DECT handset.

• Journal of electromagnetic engineering and science
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• v.7 no.2
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• pp.64-68
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• 2007

An InGaP/GaAs HBT based differential Colpitts voltage control oscillator(VCO) is presented in this paper. In the VCO core, two switching transistors are introduced to steer the core bias current to save power. An LC tank with an inductor quality factor(Q) of 11.4 is used to generate oscillation frequency. It has a superior phase noise characteristics of -130.12 dBc/Hz and -105.3 at 1 MHz and 100 kHz frequency offsets respectively from the carrier frequency(1.566 GHz) when supplied with a control voltage of 0 volt. It dissipates output power of -5.3 dBm. Two pairs of on-chip base collector (BC) diodes are used in the tank circuit to increase the VCO tuning range(168 MHz). This VCO occupies the area of $1.070{\times}0.90mm^2$ including buffer and pads.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.73-78
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• 2011

A frequency synthesizer for DAB applications is designed using $0.18{\mu}m$ CMOS process with 1.8V supply. NP-core type is chosen for VCO core to improve low power characteristic and symmetric characteristic of output waveform. VCO range is 1302.34 MHz - 1949.51 MHz using switchable capacitor bank and varactor bank. Varactor biases that improve varactor capacitance characteristics were minimized as two, $K_{vco}$(VCO gain) is maintained using technique of varactor bank switching. Intervals of $K_{vco}$ are maintained adding VCO frequency compensation logic. Each block of VCO and frequency synthesizer designed $0.18{\mu}m$ CMOS process with 1.8V supply is verified by Cadence Spectre, measured VCO consumes 9mA current, and is 39.8% tuning range, total power consumption of the frequency synthesizer is 18mW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.5
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• pp.40-49
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• 2008

A Frequency synthesizer for mobile-DTV applications is implemented using $0.18{\mu}m$ CMOS process with 1.8V supply. PMOS transistors are chosen for VCO core to reduce phase noise. The measurement result of VCO frequency range is 800MHz-1.67GHz using switchable inductors, capacitors and varactors. We use varactor bias technique for the improvement of VCO gain linearity, and the number of varactor biasing are minimized as two. VCO gain deterioration is also improved by using the varactor switching technique. The VCO gain and interval of VCO gain are maintained as low and improved using the VCO frequency calibration block. The sigma-delta modulator for fractional divider is designed by the co-simualtion method for accuracy and efficiency improvement. The VCO, PFD, CP and LF are verified by Cadence Spectre, and the sigma-delta modulator is simulated using Matlab Simulink, ModelSim and HSPICE. The power consumption of the frequency synthesizer is 18mW, and the VCO has 52.1% tuning range according to the VCO maximum output frequency. The VCO phase noise is lower than -100dBc/Hz at 1MHz at 1MHz offset for 1GHz, 1.5GHz, and 2GHz output frequencies.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.1
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• pp.61-64
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• 2001

VCO(Voltage Contolled Oscillator) is one of the main components governing the size, performance and power consumption of telecommunication devices. As the devices become much smaller, YCO need to hove much smaller size with better characteristics. Buried type passive components of L, C, R were developed previously and the structure of these components are good for minimizing the size of VCO. Our own library of passive components is used in simulation and measurement circuit designed by ourselve. In structure of multi-layered VCO, some components governing the characteristics of VCO are selected and placed on the top of oscilltor for the good tuning process. In resonator part, the stripline structure and low loss glass/ceramic material are used to get higher Q value. In our research, a VCO oscillates in the 2.3~2.36 GHz band is developed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.10
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• pp.773-782
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• 2018

A frequency-locked loop(FLL) is a negative-feedback system that uses a frequency detector to improve the phase noise of a voltage-controlled oscillator(VCO). In this work, a theoretical analysis of the phase noise of a VCO in an FLL is presented. The analysis shows that the phase noise of the VCO follows the phase noise determined by the frequency detector and the loop filter within the FLL loop bandwidth, while the phase noise of the VCO appears outside the loop bandwidth. Therefore, it is possible to design an FLL that minimizes the phase noise of the VCO based on the theoretical analysis results. The theoretical phase noise results were verified through experiments.

• 한국정보통신설비학회:학술대회논문집
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• 2009.08a
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• pp.293-297
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• 2009

In this thesis, design of a VCO(Voltage controlled Oscillator) with a novel tuning mechanism is presented for the Radar system. This circuit, the 9.5 GHz oscillator is designed and implemented by restructuring microstrip resonator to raise Q value and to require a wide frequency tuning range. This product is fabricated on 2.6 Teflon substrate and device is NE722S01. In this paper, The new microstrip resonator VCO is proposed to achieve the characteristic of a wide frequency tuning range. This microstrip resonator VCO shows the phase noise characteristic of -108.3 dBc/Hz at 1 MHz offset from the fundamental frequency, the output power of 5.7 dBm and the second harmonic suppression of -38 dBc for the VCO are obtained. The manufacture VCO shows a frequency tuning range of 193.8 MHz. The proposed micro trip resonator VCO can be used for X-band Radar System with required tuning range.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.217-218
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• 2008

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. A general method for achieving both reduced VCO gain(Kvco) and wide frequency band is to use the switched-capacitor bank LC VCO. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO with reduced variation of VCO gain and frequency steps. Buffers, divide-by-2 circuits and control logics the simulation results show that the designed circuit has a phase noise at 100kHz better than -106dBc/Hz throughout the signal band and consumes $9.5{\sim}13mA$ from a 1.8V supply.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.135-138
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• 2002

VCO(Voltage Controlled Oscillator) is one of the main components governing the size, performance and power consumption of telecommunication devices. As the devices become much smaller, VCO need to have much smaller size with better characteristics. Buried type passive components of L,C,R were developed previously and the structure of these components are good for minimizing the size of VCO. Our own library of passive components is used in simulation and fabrication of VCO circuit, and surface mounted components like varactor diode are analysed using the measurement circuit designed by ourselves. Two-Dimensional simulation of VCO circuit and local three-Dimensional structure simulation are performed and their relation is obtained. In structure of multi-layered VCO, some components governing the characteristics of VCO are selected and placed on the top of oscillator for the good tuning process. In resonator part, the stripline structure and low loss glass/ceramic material are used to get higher Q value. In our research, a VCO oscillates in the 2.3∼2.36 GHz band is developed.