• Title/Summary/Keyword: VDD Sensitivity

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Behavior of an Automatic Pacemaker Sensing Algorithm for Single-Pass VDD Atrial Electrograms (Single-Pass VDD 심파를 위한 자동화된 심장 박동기 탈분극파 검출 알고리즘의 효용성)

  • Kim, Jung-Kuk;Lee, Seung-Han;Huh, Woong
    • Journal of IKEEE
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    • v.5 no.2 s.9
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    • pp.182-189
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    • 2001
  • Single-pass VDD pacemakers have been used as a result of simple implantation procedures and generally reliable atrial tracking that ensures an A-V sequence pacing. However, there is a controversy over their reliabilities of atrial tracking. As a new sensing method for reliable atrial tracking, a simple automatic pacemaker sensing algorithm was implemented and evaluated to validate its benefits in sensing depolarization waves of Single-pass VDD atrial electrograms. The automatic sensing algorithm had a predetermined sensing dynamic range and the sensitivity level was controlled as 50% of the average of two most recently sensed intrinsic amplitudes. The behavior of the automatic sensing algorithm in the Single-pass VDD atrial electrograms was analyzed and characterized. It was observed that the automatic sensing algorithm was more effective than a conventional fixed threshold method to accurately detect and track p-waves in Single-pass VDD electrograms.

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Design of Low-Voltage Reference Voltage Generator for NVM IPs (NVM IP용 저전압 기준전압 회로 설계)

  • Kim, Meong-Seok;Jeong, Woo-Young;Park, Heon;Ha, Pan-Bong;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.375-378
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    • 2013
  • A reference voltage generator which is insensitive to PVT (process-voltage-temperature) variation necessary for NVM memory IPs such as EEPROM and MTP memories is designed in this paper. The designed BGR (bandgap reference voltage) circuit based on MagnaChip's $0.18{\mu}m$ EEPROM process uses a low-voltage bandgap reference voltage generator of cascode current-mirror type with a wide swing and shows a reference voltage characteristic insensitive to PVT variation. The minimum operating voltage is 1.43V and the VREF sensitivity against VDD variation is 0.064mV/V. Also, the VREF sensitivity against temperature variation is $20.5ppm/^{\circ}C$. The VREF voltage has a mean of 1.181V and its three sigma ($3{\sigma}$) value is 71.7mV.

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A Pacemaker AutoSense Algorithm with Dual Thresholds

  • Kim, Jung-Kuk;Huh, Woong
    • Journal of Biomedical Engineering Research
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    • v.23 no.6
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    • pp.477-484
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    • 2002
  • A pacemaker autosense algorithm with dual thresholds. one for noise or tachyarrhythmia detection (noise threshold, NT) and the other for intrinsic beat detection (sensing threshold. ST), was developed to improve the sensing performance in single pass VDD electrograms. unipolar electrograms, or atrial fibrillation detection. When a deflection in an electrogram exceeds the NT (defined as 50% of 57), the autosense algorithm with dual thresholds checks if the deflection also exceeds the ST. If it does, the autosense algorithm calculates the signal to noise ratio (SNR) of the deflection to the highest deflection detected by NT but lower than ST during the last cardiac cycle. If the SNR 2, the autosense algorithm declares an intrinsic beat detection and calculates the next ST based on the three most recent intrinsic peaks. If the SNR $\geq$2, the autosense algorithm checks the number of deflections detected by NT during the last cardiac cycle in order to determine if it is a noise detection or tachyarrhythmia detection. Usually the autosense algorithm tries to set the 57 at 37.5% of the average of the three intrinsic beats, although it changes the percentage according to event classifications. The autosense algorithm was tested through computer simulation of atrial electrograms from 5 patients obtained during EP study, to simulate a worst sensing situation. The result showed that the ST levels for autosense algorithm tracked the electrogram amplitudes properly, providing more noise immunity whenever necessary. Also, the autosense algorithm with dual thresholds achieved sensing performance as good as the conventional fixed sensitivity method that was optimized retrospectively.

0.35㎛ CMOS Low-Voltage Low-Power Voltage and Current References (0.35㎛ CMOS 저전압 저전력 기준 전압 및 전류 발생회로)

  • Park, Chan-yeong;Hwang, Jeong-Hyeon;Jo, Min-Su;Yang, Min-jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.458-461
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    • 2015
  • In this paper 2 types of voltage references and a current reference suitable for low-voltage, low-power circuits are proposed and designed with $0.35{\mu}m\;CMOS$ process. MOS transistors operating in weak inversion and bulk-driven technique are utilized to achieve low-voltage and low-power features. The first voltage reference consumes 1.43uA from a supply voltage of 1.2V while it has a reference voltage of 585mV and a TC(Temperature Coefficient) of $6ppm/^{\circ}C$. The second voltage reference consumes 48pW from a supply voltage of 0.3V while having a reference voltage of 172mV and a TC of $26ppm/^{\circ}C$. The current reference consumes 246nA from a supply voltage of 0.75V with a reference current of 32.6nA and a TC of $262ppm/^{\circ}C$. The performances of the designed references have been verified through simulations.

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